tADL_min 1347 drivers/mtd/nand/raw/atmel/nand-controller.c ncycles = DIV_ROUND_UP(conf->timings.sdr.tADL_min, mckperiodps); tADL_min 848 drivers/mtd/nand/raw/denali.c addr_2_data = DIV_ROUND_UP(timings->tADL_min, t_x); tADL_min 2340 drivers/mtd/nand/raw/marvell_nand.c nfc_tmg.tADL = TO_CYCLES(sdr->tADL_min, period_ns); tADL_min 1118 drivers/mtd/nand/raw/meson_nand.c meson_chip->tadl = DIV_ROUND_UP(PSEC_TO_NSEC(timings->tADL_min), tADL_min 1298 drivers/mtd/nand/raw/nand_base.c NAND_OP_ADDR(0, addrs, PSEC_TO_NSEC(sdr->tADL_min)), tADL_min 1576 drivers/mtd/nand/raw/nand_base.c NAND_OP_ADDR(1, &addr, PSEC_TO_NSEC(sdr->tADL_min)), tADL_min 1615 drivers/mtd/nand/raw/nand_base.c PSEC_TO_NSEC(sdr->tADL_min)), tADL_min 1743 drivers/mtd/nand/raw/nand_base.c NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tADL_min)), tADL_min 22 drivers/mtd/nand/raw/nand_timings.c .tADL_min = 400000, tADL_min 64 drivers/mtd/nand/raw/nand_timings.c .tADL_min = 400000, tADL_min 106 drivers/mtd/nand/raw/nand_timings.c .tADL_min = 400000, tADL_min 148 drivers/mtd/nand/raw/nand_timings.c .tADL_min = 400000, tADL_min 190 drivers/mtd/nand/raw/nand_timings.c .tADL_min = 400000, tADL_min 232 drivers/mtd/nand/raw/nand_timings.c .tADL_min = 400000, tADL_min 1567 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (sdrt->tADL_min > tset_mem && tADL_min 1568 drivers/mtd/nand/raw/stm32_fmc2_nand.c (thold_att < sdrt->tADL_min - tset_mem)) tADL_min 1569 drivers/mtd/nand/raw/stm32_fmc2_nand.c thold_att = sdrt->tADL_min - tset_mem; tADL_min 1457 drivers/mtd/nand/raw/sunxi_nand.c if (timings->tADL_min > (min_clk_period * 32)) tADL_min 1458 drivers/mtd/nand/raw/sunxi_nand.c min_clk_period = DIV_ROUND_UP(timings->tADL_min, 32); tADL_min 1487 drivers/mtd/nand/raw/sunxi_nand.c tADL = DIV_ROUND_UP(timings->tADL_min, min_clk_period) >> 3; tADL_min 808 drivers/mtd/nand/raw/tegra_nand.c val = DIV_ROUND_UP(timings->tADL_min, period); tADL_min 448 include/linux/mtd/rawnand.h u32 tADL_min;