t1_t3            2085 drivers/gpu/drm/gma500/cdv_intel_dp.c                 cur.t1_t3 = (pp_on & PANEL_POWER_UP_DELAY_MASK) >>
t1_t3            2101 drivers/gpu/drm/gma500/cdv_intel_dp.c                               cur.t1_t3, cur.t8, cur.t9, cur.t10, cur.t11_t12);
t1_t3            2104 drivers/gpu/drm/gma500/cdv_intel_dp.c 		intel_dp->panel_power_up_delay = cur.t1_t3 / 10;
t1_t3              83 drivers/gpu/drm/gma500/intel_bios.c 				dev_priv->edp.pps.t1_t3, dev_priv->edp.pps.t8, 
t1_t3             445 drivers/gpu/drm/gma500/intel_bios.h 	u16 t1_t3;
t1_t3              49 drivers/gpu/drm/i915/display/intel_bios.h 	u16 t1_t3;
t1_t3            6396 drivers/gpu/drm/i915/display/intel_dp.c 	seq->t1_t3 = REG_FIELD_GET(PANEL_POWER_UP_DELAY_MASK, pp_on);
t1_t3            6417 drivers/gpu/drm/i915/display/intel_dp.c 		      seq->t1_t3, seq->t8, seq->t9, seq->t10, seq->t11_t12);
t1_t3            6428 drivers/gpu/drm/i915/display/intel_dp.c 	if (hw.t1_t3 != sw->t1_t3 || hw.t8 != sw->t8 || hw.t9 != sw->t9 ||
t1_t3            6472 drivers/gpu/drm/i915/display/intel_dp.c 	spec.t1_t3 = 210 * 10;
t1_t3            6489 drivers/gpu/drm/i915/display/intel_dp.c 	assign_final(t1_t3);
t1_t3            6497 drivers/gpu/drm/i915/display/intel_dp.c 	intel_dp->panel_power_up_delay = get_delay(t1_t3);
t1_t3            6568 drivers/gpu/drm/i915/display/intel_dp.c 	pp_on = REG_FIELD_PREP(PANEL_POWER_UP_DELAY_MASK, seq->t1_t3) |