t1_t2 53 drivers/gpu/drm/i915/display/intel_lvds.c int t1_t2; t1_t2 163 drivers/gpu/drm/i915/display/intel_lvds.c pps->t1_t2 = REG_FIELD_GET(PANEL_POWER_UP_DELAY_MASK, val); t1_t2 184 drivers/gpu/drm/i915/display/intel_lvds.c pps->t1_t2 == 0 && pps->t5 == 0 && pps->t3 == 0 && pps->tx == 0) { t1_t2 188 drivers/gpu/drm/i915/display/intel_lvds.c pps->t1_t2 = 40 * 10; t1_t2 197 drivers/gpu/drm/i915/display/intel_lvds.c pps->t1_t2, pps->t3, pps->t4, pps->t5, pps->tx, t1_t2 214 drivers/gpu/drm/i915/display/intel_lvds.c REG_FIELD_PREP(PANEL_POWER_UP_DELAY_MASK, pps->t1_t2) |