t1_int_cntrl       35 arch/m68k/include/asm/mvme147hw.h    volatile u_char	t1_int_cntrl;
t1_int_cntrl      120 arch/m68k/mvme147/config.c 	m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;
t1_int_cntrl      141 arch/m68k/mvme147/config.c 	m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;  /* clear pending ints */
t1_int_cntrl      142 arch/m68k/mvme147/config.c 	m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1;