sysctrl_base 2810 drivers/mtd/nand/raw/marvell_nand.c struct regmap *sysctrl_base = sysctrl_base 2814 drivers/mtd/nand/raw/marvell_nand.c if (IS_ERR(sysctrl_base)) sysctrl_base 2815 drivers/mtd/nand/raw/marvell_nand.c return PTR_ERR(sysctrl_base); sysctrl_base 2817 drivers/mtd/nand/raw/marvell_nand.c regmap_write(sysctrl_base, GENCONF_SOC_DEVICE_MUX, sysctrl_base 2823 drivers/mtd/nand/raw/marvell_nand.c regmap_update_bits(sysctrl_base, GENCONF_CLK_GATING_CTRL, sysctrl_base 2827 drivers/mtd/nand/raw/marvell_nand.c regmap_update_bits(sysctrl_base, GENCONF_ND_CLK_CTRL, sysctrl_base 212 drivers/net/ethernet/hisilicon/hip04_eth.c void __iomem *sysctrl_base; sysctrl_base 296 drivers/net/ethernet/hisilicon/hip04_eth.c writel_relaxed(RESET_DREQ_ALL, priv->sysctrl_base + SC_PPE_RESET_DREQ); sysctrl_base 928 drivers/net/ethernet/hisilicon/hip04_eth.c priv->sysctrl_base = devm_platform_ioremap_resource(pdev, 1); sysctrl_base 929 drivers/net/ethernet/hisilicon/hip04_eth.c if (IS_ERR(priv->sysctrl_base)) { sysctrl_base 930 drivers/net/ethernet/hisilicon/hip04_eth.c ret = PTR_ERR(priv->sysctrl_base); sysctrl_base 770 drivers/net/ethernet/marvell/mvpp2/mvpp2.h struct regmap *sysctrl_base; sysctrl_base 1126 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_read(priv->sysctrl_base, GENCONF_PORT_CTRL0, &val); sysctrl_base 1128 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_write(priv->sysctrl_base, GENCONF_PORT_CTRL0, val); sysctrl_base 1130 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_read(priv->sysctrl_base, GENCONF_CTRL0, &val); sysctrl_base 1135 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_write(priv->sysctrl_base, GENCONF_CTRL0, val); sysctrl_base 1143 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_read(priv->sysctrl_base, GENCONF_PORT_CTRL0, &val); sysctrl_base 1146 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_write(priv->sysctrl_base, GENCONF_PORT_CTRL0, val); sysctrl_base 1149 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_read(priv->sysctrl_base, GENCONF_CTRL0, &val); sysctrl_base 1154 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_write(priv->sysctrl_base, GENCONF_CTRL0, val); sysctrl_base 1186 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c if (!priv->sysctrl_base) sysctrl_base 1212 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_read(priv->sysctrl_base, GENCONF_PORT_CTRL1, &val); sysctrl_base 1215 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_write(priv->sysctrl_base, GENCONF_PORT_CTRL1, val); sysctrl_base 1217 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_read(priv->sysctrl_base, GENCONF_PORT_CTRL0, &val); sysctrl_base 1219 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_write(priv->sysctrl_base, GENCONF_PORT_CTRL0, val); sysctrl_base 1221 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_read(priv->sysctrl_base, GENCONF_SOFT_RESET1, &val); sysctrl_base 1223 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c regmap_write(priv->sysctrl_base, GENCONF_SOFT_RESET1, val); sysctrl_base 5749 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c priv->sysctrl_base = sysctrl_base 5752 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c if (IS_ERR(priv->sysctrl_base)) sysctrl_base 5758 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c priv->sysctrl_base = NULL;