sys_manager_base_addr   29 arch/arm/mach-socfpga/core.h extern void __iomem *sys_manager_base_addr;
sys_manager_base_addr   65 arch/arm/mach-socfpga/l2_cache.c 	if (!sys_manager_base_addr) {
sys_manager_base_addr   70 arch/arm/mach-socfpga/l2_cache.c 	writel(A10_SYSMGR_MPU_CLEAR_L2_ECC, (sys_manager_base_addr +
sys_manager_base_addr   73 arch/arm/mach-socfpga/l2_cache.c 	writel(A10_SYSMGR_ECC_INTMASK_CLR_L2, sys_manager_base_addr +
sys_manager_base_addr  121 arch/arm/mach-socfpga/ocram.c 	if (!sys_manager_base_addr) {
sys_manager_base_addr  143 arch/arm/mach-socfpga/ocram.c 	       sys_manager_base_addr + A10_SYSMGR_ECC_INTMASK_SET_OFST);
sys_manager_base_addr  165 arch/arm/mach-socfpga/ocram.c 	       sys_manager_base_addr + A10_SYSMGR_ECC_INTMASK_CLR_OFST);
sys_manager_base_addr   33 arch/arm/mach-socfpga/platsmp.c 		       sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff));
sys_manager_base_addr   56 arch/arm/mach-socfpga/platsmp.c 		       sys_manager_base_addr + (socfpga_cpu1start_addr & 0x00000fff));
sys_manager_base_addr   19 arch/arm/mach-socfpga/socfpga.c void __iomem *sys_manager_base_addr;
sys_manager_base_addr   38 arch/arm/mach-socfpga/socfpga.c 	sys_manager_base_addr = of_iomap(np, 0);