sync_width         59 arch/powerpc/include/asm/ps3gpu.h 				  u64 ioif_offset, u64 sync_width, u64 pitch)
sync_width         63 arch/powerpc/include/asm/ps3gpu.h 					 ddr_offset, ioif_offset, sync_width,
sync_width        248 drivers/gpu/drm/i915/display/intel_panel.c 	u32 border, sync_pos, blank_width, sync_width;
sync_width        251 drivers/gpu/drm/i915/display/intel_panel.c 	sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
sync_width        253 drivers/gpu/drm/i915/display/intel_panel.c 	sync_pos = (blank_width - sync_width + 1) / 2;
sync_width        263 drivers/gpu/drm/i915/display/intel_panel.c 	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
sync_width        270 drivers/gpu/drm/i915/display/intel_panel.c 	u32 border, sync_pos, blank_width, sync_width;
sync_width        273 drivers/gpu/drm/i915/display/intel_panel.c 	sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
sync_width        275 drivers/gpu/drm/i915/display/intel_panel.c 	sync_pos = (blank_width - sync_width + 1) / 2;
sync_width        284 drivers/gpu/drm/i915/display/intel_panel.c 	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
sync_width         97 drivers/gpu/drm/mediatek/mtk_dpi.c 	u32 sync_width;
sync_width        143 drivers/gpu/drm/mediatek/mtk_dpi.c 		     sync->sync_width << HPW, HPW_MASK);
sync_width        155 drivers/gpu/drm/mediatek/mtk_dpi.c 		     sync->sync_width << VSYNC_WIDTH_SHIFT,
sync_width        458 drivers/gpu/drm/mediatek/mtk_dpi.c 	hsync.sync_width = vm.hsync_len;
sync_width        462 drivers/gpu/drm/mediatek/mtk_dpi.c 	vsync_lodd.sync_width = vm.vsync_len;