sync_off_width_high 762 drivers/gpu/drm/gma500/psb_intel_sdvo.c dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | sync_off_width_high 783 drivers/gpu/drm/gma500/psb_intel_sdvo.c mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; sync_off_width_high 785 drivers/gpu/drm/gma500/psb_intel_sdvo.c mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; sync_off_width_high 793 drivers/gpu/drm/gma500/psb_intel_sdvo.c mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; sync_off_width_high 797 drivers/gpu/drm/gma500/psb_intel_sdvo.c mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; sync_off_width_high 85 drivers/gpu/drm/gma500/psb_intel_sdvo_regs.h u8 sync_off_width_high; sync_off_width_high 866 drivers/gpu/drm/i915/display/intel_sdvo.c dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | sync_off_width_high 889 drivers/gpu/drm/i915/display/intel_sdvo.c mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; sync_off_width_high 891 drivers/gpu/drm/i915/display/intel_sdvo.c mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; sync_off_width_high 899 drivers/gpu/drm/i915/display/intel_sdvo.c mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; sync_off_width_high 903 drivers/gpu/drm/i915/display/intel_sdvo.c mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; sync_off_width_high 96 drivers/gpu/drm/i915/display/intel_sdvo_regs.h u8 sync_off_width_high;