CM_BLNDGAM_CONTROL 1170 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	uint32_t CM_BLNDGAM_CONTROL; \
CM_BLNDGAM_CONTROL   36 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h 	SRI(CM_BLNDGAM_CONTROL, CM, id), \
CM_BLNDGAM_CONTROL  323 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 		REG_SET(CM_BLNDGAM_CONTROL, 0, CM_BLNDGAM_LUT_MODE, 0);
CM_BLNDGAM_CONTROL  343 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 	REG_SET(CM_BLNDGAM_CONTROL, 0, CM_BLNDGAM_LUT_MODE,