sw_irq            120 arch/mips/txx9/rbtx4927/irq.c static int toshiba_rbtx4927_irq_nested(int sw_irq)
sw_irq             72 arch/mips/txx9/rbtx4938/irq.c static int toshiba_rbtx4938_irq_nested(int sw_irq)
sw_irq            113 arch/powerpc/include/asm/xive.h extern int xive_native_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq);
sw_irq            100 arch/powerpc/sysdev/xive/native.c int xive_native_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq)
sw_irq            105 arch/powerpc/sysdev/xive/native.c 		rc = opal_xive_set_irq_config(hw_irq, target, prio, sw_irq);
sw_irq            115 arch/powerpc/sysdev/xive/native.c 				      u32 *sw_irq)
sw_irq            124 arch/powerpc/sysdev/xive/native.c 	*sw_irq = be32_to_cpu(lirq);
sw_irq            195 arch/powerpc/sysdev/xive/spapr.c 					unsigned long sw_irq)
sw_irq            201 arch/powerpc/sysdev/xive/spapr.c 		flags, lisn, target, prio, sw_irq);
sw_irq            206 arch/powerpc/sysdev/xive/spapr.c 					target, prio, sw_irq);
sw_irq            222 arch/powerpc/sysdev/xive/spapr.c 					unsigned long *sw_irq)
sw_irq            231 arch/powerpc/sysdev/xive/spapr.c 				 target, prio, sw_irq);
sw_irq            242 arch/powerpc/sysdev/xive/spapr.c 	*sw_irq = retbuf[2];
sw_irq            431 arch/powerpc/sysdev/xive/spapr.c static int xive_spapr_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq)
sw_irq            436 arch/powerpc/sysdev/xive/spapr.c 					 prio, sw_irq);
sw_irq            442 arch/powerpc/sysdev/xive/spapr.c 				     u32 *sw_irq)
sw_irq            454 arch/powerpc/sysdev/xive/spapr.c 	*sw_irq = h_sw_irq;
sw_irq             42 arch/powerpc/sysdev/xive/xive-internal.h 	int 	(*configure_irq)(u32 hw_irq, u32 target, u8 prio, u32 sw_irq);
sw_irq             44 arch/powerpc/sysdev/xive/xive-internal.h 				  u32 *sw_irq);