sw_i2cs           535 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c 		engine = pool->sw_i2cs[line];
sw_i2cs           714 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		if (pool->base.sw_i2cs[i] != NULL) {
sw_i2cs           715 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 			kfree(pool->base.sw_i2cs[i]);
sw_i2cs           716 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 			pool->base.sw_i2cs[i] = NULL;
sw_i2cs          1060 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c 		pool->base.sw_i2cs[i] = NULL;
sw_i2cs           771 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		if (pool->base.sw_i2cs[i] != NULL) {
sw_i2cs           772 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			kfree(pool->base.sw_i2cs[i]);
sw_i2cs           773 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			pool->base.sw_i2cs[i] = NULL;
sw_i2cs          1418 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		pool->base.sw_i2cs[i] = NULL;
sw_i2cs           733 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		if (pool->base.sw_i2cs[i] != NULL) {
sw_i2cs           734 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			kfree(pool->base.sw_i2cs[i]);
sw_i2cs           735 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			pool->base.sw_i2cs[i] = NULL;
sw_i2cs          1307 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		pool->base.sw_i2cs[i] = NULL;
sw_i2cs           584 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		if (pool->base.sw_i2cs[i] != NULL) {
sw_i2cs           585 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 			kfree(pool->base.sw_i2cs[i]);
sw_i2cs           586 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 			pool->base.sw_i2cs[i] = NULL;
sw_i2cs          1159 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		pool->base.sw_i2cs[i] = NULL;
sw_i2cs           762 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		if (pool->base.sw_i2cs[i] != NULL) {
sw_i2cs           763 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 			kfree(pool->base.sw_i2cs[i]);
sw_i2cs           764 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 			pool->base.sw_i2cs[i] = NULL;
sw_i2cs          1023 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		pool->base.sw_i2cs[i] = dce80_i2c_sw_create(ctx);
sw_i2cs          1024 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		if (pool->base.sw_i2cs[i] == NULL) {
sw_i2cs          1220 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		pool->base.sw_i2cs[i] = dce80_i2c_sw_create(ctx);
sw_i2cs          1221 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		if (pool->base.sw_i2cs[i] == NULL) {
sw_i2cs          1413 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		pool->base.sw_i2cs[i] = dce80_i2c_sw_create(ctx);
sw_i2cs          1414 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c 		if (pool->base.sw_i2cs[i] == NULL) {
sw_i2cs           938 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 		if (pool->base.sw_i2cs[i] != NULL) {
sw_i2cs           939 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 			kfree(pool->base.sw_i2cs[i]);
sw_i2cs           940 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 			pool->base.sw_i2cs[i] = NULL;
sw_i2cs          1512 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 		pool->base.sw_i2cs[i] = NULL;
sw_i2cs          1354 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		if (pool->base.sw_i2cs[i] != NULL) {
sw_i2cs          1355 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			kfree(pool->base.sw_i2cs[i]);
sw_i2cs          1356 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			pool->base.sw_i2cs[i] = NULL;
sw_i2cs          3658 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		pool->base.sw_i2cs[i] = NULL;
sw_i2cs           882 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 		if (pool->base.sw_i2cs[i] != NULL) {
sw_i2cs           883 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 			kfree(pool->base.sw_i2cs[i]);
sw_i2cs           884 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 			pool->base.sw_i2cs[i] = NULL;
sw_i2cs          1588 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 		pool->base.sw_i2cs[i] = NULL;
sw_i2cs           178 drivers/gpu/drm/amd/display/dc/inc/core_types.h 	struct dce_i2c_sw *sw_i2cs[MAX_PIPES];