CM_3DLUT_READ_WRITE_CONTROL 1234 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	uint32_t CM_3DLUT_READ_WRITE_CONTROL; \
CM_3DLUT_READ_WRITE_CONTROL  101 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h 	SRI(CM_3DLUT_READ_WRITE_CONTROL, CM, id), \
CM_3DLUT_READ_WRITE_CONTROL  769 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 	REG_GET_2(CM_3DLUT_READ_WRITE_CONTROL,
CM_3DLUT_READ_WRITE_CONTROL  834 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 	REG_UPDATE_2(CM_3DLUT_READ_WRITE_CONTROL,
CM_3DLUT_READ_WRITE_CONTROL  903 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 	REG_UPDATE(CM_3DLUT_READ_WRITE_CONTROL, CM_3DLUT_WRITE_EN_MASK,