surface_pitch 2787 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane_size->surface_pitch = surface_pitch 2800 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane_size->surface_pitch = surface_pitch 2856 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c pipe[i].bottom_pipe->plane_state->plane_size.surface_pitch); surface_pitch 1436 drivers/gpu/drm/amd/display/dc/core/dc.c if (u->plane_info->plane_size.surface_pitch != u->surface->plane_size.surface_pitch surface_pitch 1437 drivers/gpu/drm/amd/display/dc/core/dc.c || u->plane_info->plane_size.surface_pitch != u->surface->plane_size.surface_pitch surface_pitch 127 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->plane_size.surface_pitch); surface_pitch 214 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->plane_size.surface_pitch, surface_pitch 123 drivers/gpu/drm/amd/display/dc/dc_hw_types.h int surface_pitch; surface_pitch 131 drivers/gpu/drm/amd/display/dc/dc_hw_types.h int surface_pitch; surface_pitch 426 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c GRPH_PITCH, plane_size->surface_pitch); surface_pitch 251 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, local_size.surface_pitch, surface_pitch 179 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c pitch = plane_size->surface_pitch - 1; surface_pitch 184 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c pitch = plane_size->surface_pitch - 1; surface_pitch 341 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c pitch = plane_size->surface_pitch - 1; surface_pitch 346 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c pitch = plane_size->surface_pitch - 1; surface_pitch 2088 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.data_pitch = pln->plane_size.surface_pitch; surface_pitch 2093 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.src.data_pitch = pln->plane_size.surface_pitch;