subcaches          32 arch/x86/include/asm/amd_nb.h 	u8	 subcaches[4];
subcaches         315 arch/x86/kernel/cpu/cacheinfo.c 	l3->subcaches[0] = sc0 = !(val & BIT(0));
subcaches         316 arch/x86/kernel/cpu/cacheinfo.c 	l3->subcaches[1] = sc1 = !(val & BIT(4));
subcaches         319 arch/x86/kernel/cpu/cacheinfo.c 		l3->subcaches[0] = sc0 += !(val & BIT(1));
subcaches         320 arch/x86/kernel/cpu/cacheinfo.c 		l3->subcaches[1] = sc1 += !(val & BIT(5));
subcaches         323 arch/x86/kernel/cpu/cacheinfo.c 	l3->subcaches[2] = sc2 = !(val & BIT(8))  + !(val & BIT(9));
subcaches         324 arch/x86/kernel/cpu/cacheinfo.c 	l3->subcaches[3] = sc3 = !(val & BIT(12)) + !(val & BIT(13));
subcaches         386 arch/x86/kernel/cpu/cacheinfo.c 		if (!nb->l3_cache.subcaches[i])
subcaches         504 arch/x86/kernel/cpu/cacheinfo.c static DEVICE_ATTR_RW(subcaches);