stxx_spi4_calx    234 arch/mips/cavium-octeon/executive/cvmx-spi.c 		union cvmx_stxx_spi4_calx stxx_spi4_calx;
stxx_spi4_calx    241 arch/mips/cavium-octeon/executive/cvmx-spi.c 		stxx_spi4_calx.u64 = 0;
stxx_spi4_calx    242 arch/mips/cavium-octeon/executive/cvmx-spi.c 		stxx_spi4_calx.s.oddpar = 1;
stxx_spi4_calx    244 arch/mips/cavium-octeon/executive/cvmx-spi.c 			       stxx_spi4_calx.u64);
stxx_spi4_calx    394 arch/mips/cavium-octeon/executive/cvmx-spi.c 			union cvmx_stxx_spi4_calx stxx_spi4_calx;
stxx_spi4_calx    395 arch/mips/cavium-octeon/executive/cvmx-spi.c 			stxx_spi4_calx.u64 = 0;
stxx_spi4_calx    396 arch/mips/cavium-octeon/executive/cvmx-spi.c 			stxx_spi4_calx.s.prt0 = port++;
stxx_spi4_calx    397 arch/mips/cavium-octeon/executive/cvmx-spi.c 			stxx_spi4_calx.s.prt1 = port++;
stxx_spi4_calx    398 arch/mips/cavium-octeon/executive/cvmx-spi.c 			stxx_spi4_calx.s.prt2 = port++;
stxx_spi4_calx    399 arch/mips/cavium-octeon/executive/cvmx-spi.c 			stxx_spi4_calx.s.prt3 = port++;
stxx_spi4_calx    400 arch/mips/cavium-octeon/executive/cvmx-spi.c 			stxx_spi4_calx.s.oddpar =
stxx_spi4_calx    401 arch/mips/cavium-octeon/executive/cvmx-spi.c 			    ~(cvmx_dpop(stxx_spi4_calx.u64) & 1);
stxx_spi4_calx    403 arch/mips/cavium-octeon/executive/cvmx-spi.c 				       stxx_spi4_calx.u64);