stxx_com_ctl      598 arch/mips/cavium-octeon/executive/cvmx-spi.c 		union cvmx_stxx_com_ctl stxx_com_ctl;
stxx_com_ctl      599 arch/mips/cavium-octeon/executive/cvmx-spi.c 		stxx_com_ctl.u64 = 0;
stxx_com_ctl      600 arch/mips/cavium-octeon/executive/cvmx-spi.c 		stxx_com_ctl.s.st_en = 1;
stxx_com_ctl      601 arch/mips/cavium-octeon/executive/cvmx-spi.c 		cvmx_write_csr(CVMX_STXX_COM_CTL(interface), stxx_com_ctl.u64);
stxx_com_ctl      648 arch/mips/cavium-octeon/executive/cvmx-spi.c 		union cvmx_stxx_com_ctl stxx_com_ctl;
stxx_com_ctl      649 arch/mips/cavium-octeon/executive/cvmx-spi.c 		stxx_com_ctl.u64 = cvmx_read_csr(CVMX_STXX_COM_CTL(interface));
stxx_com_ctl      650 arch/mips/cavium-octeon/executive/cvmx-spi.c 		stxx_com_ctl.s.inf_en = 1;
stxx_com_ctl      651 arch/mips/cavium-octeon/executive/cvmx-spi.c 		cvmx_write_csr(CVMX_STXX_COM_CTL(interface), stxx_com_ctl.u64);