SclkFcwRangeTable 367 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h sclkFcwRange_t SclkFcwRangeTable[NUM_SCLK_RANGE]; SclkFcwRangeTable 373 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h sclkFcwRange_t SclkFcwRangeTable[NUM_SCLK_RANGE]; SclkFcwRangeTable 810 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->SclkFcwRangeTable[i].vco_setting = range_table_from_vbios.entry[i].ucVco_setting; SclkFcwRangeTable 811 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->SclkFcwRangeTable[i].postdiv = range_table_from_vbios.entry[i].ucPostdiv; SclkFcwRangeTable 812 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->SclkFcwRangeTable[i].fcw_pcc = range_table_from_vbios.entry[i].usFcw_pcc; SclkFcwRangeTable 814 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->SclkFcwRangeTable[i].fcw_trans_upper = range_table_from_vbios.entry[i].usFcw_trans_upper; SclkFcwRangeTable 815 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->SclkFcwRangeTable[i].fcw_trans_lower = range_table_from_vbios.entry[i].usRcw_trans_lower; SclkFcwRangeTable 817 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_pcc); SclkFcwRangeTable 818 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_upper); SclkFcwRangeTable 819 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_lower); SclkFcwRangeTable 828 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->SclkFcwRangeTable[i].vco_setting = Range_Table[i].vco_setting; SclkFcwRangeTable 829 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->SclkFcwRangeTable[i].postdiv = Range_Table[i].postdiv; SclkFcwRangeTable 830 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->SclkFcwRangeTable[i].fcw_pcc = Range_Table[i].fcw_pcc; SclkFcwRangeTable 832 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->SclkFcwRangeTable[i].fcw_trans_upper = Range_Table[i].fcw_trans_upper; SclkFcwRangeTable 833 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c table->SclkFcwRangeTable[i].fcw_trans_lower = Range_Table[i].fcw_trans_lower; SclkFcwRangeTable 835 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_pcc); SclkFcwRangeTable 836 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_upper); SclkFcwRangeTable 837 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_lower); SclkFcwRangeTable 881 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c sclk_setting->Fcw_int = (uint16_t)((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock); SclkFcwRangeTable 882 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; SclkFcwRangeTable 889 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c sclk_setting->Pcc_fcw_int = (uint16_t)((pcc_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock); SclkFcwRangeTable 896 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c sclk_setting->Fcw1_int = (uint16_t)((ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / ref_clock); SclkFcwRangeTable 897 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c temp = ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; SclkFcwRangeTable 678 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->SclkFcwRangeTable[i].vco_setting = SclkFcwRangeTable 680 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->SclkFcwRangeTable[i].postdiv = SclkFcwRangeTable 682 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->SclkFcwRangeTable[i].fcw_pcc = SclkFcwRangeTable 685 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->SclkFcwRangeTable[i].fcw_trans_upper = SclkFcwRangeTable 687 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->SclkFcwRangeTable[i].fcw_trans_lower = SclkFcwRangeTable 690 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_pcc); SclkFcwRangeTable 691 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_upper); SclkFcwRangeTable 692 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_lower); SclkFcwRangeTable 703 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->SclkFcwRangeTable[i].vco_setting = Range_Table[i].vco_setting; SclkFcwRangeTable 704 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->SclkFcwRangeTable[i].postdiv = Range_Table[i].postdiv; SclkFcwRangeTable 705 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->SclkFcwRangeTable[i].fcw_pcc = Range_Table[i].fcw_pcc; SclkFcwRangeTable 707 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->SclkFcwRangeTable[i].fcw_trans_upper = Range_Table[i].fcw_trans_upper; SclkFcwRangeTable 708 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c table->SclkFcwRangeTable[i].fcw_trans_lower = Range_Table[i].fcw_trans_lower; SclkFcwRangeTable 710 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_pcc); SclkFcwRangeTable 711 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_upper); SclkFcwRangeTable 712 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->SclkFcwRangeTable[i].fcw_trans_lower); SclkFcwRangeTable 757 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c ((clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / SclkFcwRangeTable 759 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c temp = clock << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv; SclkFcwRangeTable 767 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c ((pcc_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / SclkFcwRangeTable 776 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c ((ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv) / SclkFcwRangeTable 778 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c temp = ss_target_freq << table->SclkFcwRangeTable[sclk_setting->PllRange].postdiv;