SYSTEM_ACCESS_MODE  122 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE, 3);
SYSTEM_ACCESS_MODE  118 drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c 	tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE, 3);
SYSTEM_ACCESS_MODE  602 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE, 3);
SYSTEM_ACCESS_MODE  829 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE, 3);
SYSTEM_ACCESS_MODE  148 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE, 3);
SYSTEM_ACCESS_MODE  104 drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c 	tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE, 3);
SYSTEM_ACCESS_MODE  173 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c 			    SYSTEM_ACCESS_MODE, 3);
SYSTEM_ACCESS_MODE  716 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	type SYSTEM_ACCESS_MODE;\
SYSTEM_ACCESS_MODE  809 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 			SYSTEM_ACCESS_MODE, 3);
SYSTEM_ACCESS_MODE  383 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h 	HUBP_SF(HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE, mask_sh),\
SYSTEM_ACCESS_MODE  573 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h 	type SYSTEM_ACCESS_MODE;\
SYSTEM_ACCESS_MODE   74 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 			SYSTEM_ACCESS_MODE, 0x3);
SYSTEM_ACCESS_MODE  189 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c 			SYSTEM_ACCESS_MODE, 0x3);