step_index        160 drivers/gpu/drm/radeon/rv6xx_dpm.c 				  u32 step_index, struct rv6xx_sclk_stepping *step)
step_index        170 drivers/gpu/drm/radeon/rv6xx_dpm.c 	r600_engine_clock_entry_enable(rdev, step_index, true);
step_index        171 drivers/gpu/drm/radeon/rv6xx_dpm.c 	r600_engine_clock_entry_enable_pulse_skipping(rdev, step_index, false);
step_index        174 drivers/gpu/drm/radeon/rv6xx_dpm.c 		r600_engine_clock_entry_enable_post_divider(rdev, step_index, false);
step_index        179 drivers/gpu/drm/radeon/rv6xx_dpm.c 		r600_engine_clock_entry_enable_post_divider(rdev, step_index, true);
step_index        180 drivers/gpu/drm/radeon/rv6xx_dpm.c 		r600_engine_clock_entry_set_post_divider(rdev, step_index, (hi_len << 4) | lo_len);
step_index        186 drivers/gpu/drm/radeon/rv6xx_dpm.c 	r600_engine_clock_entry_set_reference_divider(rdev, step_index,
step_index        188 drivers/gpu/drm/radeon/rv6xx_dpm.c 	r600_engine_clock_entry_set_feedback_divider(rdev, step_index, fb_divider);
step_index        189 drivers/gpu/drm/radeon/rv6xx_dpm.c 	r600_engine_clock_entry_set_step_time(rdev, step_index, spll_step_count);
step_index        246 drivers/gpu/drm/radeon/rv6xx_dpm.c 	u32 step_index = start_index;
step_index        251 drivers/gpu/drm/radeon/rv6xx_dpm.c 	rv6xx_output_stepping(rdev, step_index++, &cur);
step_index        272 drivers/gpu/drm/radeon/rv6xx_dpm.c 				rv6xx_output_stepping(rdev, step_index++, &tiny);
step_index        281 drivers/gpu/drm/radeon/rv6xx_dpm.c 				rv6xx_output_stepping(rdev, step_index++, &final_vco);
step_index        284 drivers/gpu/drm/radeon/rv6xx_dpm.c 			rv6xx_output_stepping(rdev, step_index++, &target);
step_index        287 drivers/gpu/drm/radeon/rv6xx_dpm.c 			rv6xx_output_stepping(rdev, step_index++, &next);
step_index        292 drivers/gpu/drm/radeon/rv6xx_dpm.c 	*end_index = (u8)step_index - 1;
step_index        308 drivers/gpu/drm/radeon/rv6xx_dpm.c 	u32 step_index;
step_index        310 drivers/gpu/drm/radeon/rv6xx_dpm.c 	for (step_index = start_index + 1; step_index < end_index; step_index++)
step_index        311 drivers/gpu/drm/radeon/rv6xx_dpm.c 		r600_engine_clock_entry_enable(rdev, step_index, false);