step_b           1226 drivers/clk/tegra/clk-pll.c 	u32 step_a, step_b;
step_b           1233 drivers/clk/tegra/clk-pll.c 		step_b = 0x0B;
step_b           1237 drivers/clk/tegra/clk-pll.c 		step_b = 0x09;
step_b           1241 drivers/clk/tegra/clk-pll.c 		step_b = 0x08;
step_b           1251 drivers/clk/tegra/clk-pll.c 	val |= step_b << pll_params->stepb_shift;
step_b           1032 drivers/clk/tegra/clk-tegra210.c static void pllx_get_dyn_steps(struct clk_hw *hw, u32 *step_a, u32 *step_b)
step_b           1049 drivers/clk/tegra/clk-tegra210.c 		*step_b = 0x0B;
step_b           1053 drivers/clk/tegra/clk-tegra210.c 		*step_b = 0x08;
step_b           1057 drivers/clk/tegra/clk-tegra210.c 		*step_b = 0x05;
step_b           1100 drivers/clk/tegra/clk-tegra210.c 	u32 step_a, step_b;
step_b           1105 drivers/clk/tegra/clk-tegra210.c 	pllx_get_dyn_steps(&pllx->hw, &step_a, &step_b);
step_b           1109 drivers/clk/tegra/clk-tegra210.c 	val |= step_b << PLLX_MISC2_DYNRAMP_STEPB_SHIFT;
step_b            511 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c 	u32 step_a, step_b;
step_b            518 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c 		step_b = 0x0b;
step_b            522 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c 		step_b = 0x08;
step_b            526 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c 		step_b = 0x05;
step_b            537 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c 		step_b << GPCPLL_CFG3_PLL_STEPB_SHIFT);