step_a 1226 drivers/clk/tegra/clk-pll.c u32 step_a, step_b; step_a 1232 drivers/clk/tegra/clk-pll.c step_a = 0x2B; step_a 1236 drivers/clk/tegra/clk-pll.c step_a = 0x1A; step_a 1240 drivers/clk/tegra/clk-pll.c step_a = 0x12; step_a 1250 drivers/clk/tegra/clk-pll.c val = step_a << pll_params->stepa_shift; step_a 1032 drivers/clk/tegra/clk-tegra210.c static void pllx_get_dyn_steps(struct clk_hw *hw, u32 *step_a, u32 *step_b) step_a 1048 drivers/clk/tegra/clk-tegra210.c *step_a = 0x2B; step_a 1052 drivers/clk/tegra/clk-tegra210.c *step_a = 0x12; step_a 1056 drivers/clk/tegra/clk-tegra210.c *step_a = 0x04; step_a 1100 drivers/clk/tegra/clk-tegra210.c u32 step_a, step_b; step_a 1105 drivers/clk/tegra/clk-tegra210.c pllx_get_dyn_steps(&pllx->hw, &step_a, &step_b); step_a 1108 drivers/clk/tegra/clk-tegra210.c val |= step_a << PLLX_MISC2_DYNRAMP_STEPA_SHIFT; step_a 511 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c u32 step_a, step_b; step_a 517 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c step_a = 0x2b; step_a 521 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c step_a = 0x12; step_a 525 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c step_a = 0x04; step_a 535 drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c step_a << GPCPLL_CFG2_PLL_STEPA_SHIFT);