stat_regs 7304 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int = RREG32(DISP_INTERRUPT_STATUS); stat_regs 7305 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont = RREG32(DISP_INTERRUPT_STATUS_CONTINUE); stat_regs 7306 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont2 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE2); stat_regs 7307 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont3 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE3); stat_regs 7308 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont4 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE4); stat_regs 7309 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont5 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE5); stat_regs 7310 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont6 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE6); stat_regs 7312 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d1grph_int = RREG32(GRPH_INT_STATUS + stat_regs 7314 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d2grph_int = RREG32(GRPH_INT_STATUS + stat_regs 7317 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d3grph_int = RREG32(GRPH_INT_STATUS + stat_regs 7319 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d4grph_int = RREG32(GRPH_INT_STATUS + stat_regs 7323 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d5grph_int = RREG32(GRPH_INT_STATUS + stat_regs 7325 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.d6grph_int = RREG32(GRPH_INT_STATUS + stat_regs 7329 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d1grph_int & GRPH_PFLIP_INT_OCCURRED) stat_regs 7332 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d2grph_int & GRPH_PFLIP_INT_OCCURRED) stat_regs 7335 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT) stat_regs 7337 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT) stat_regs 7339 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VBLANK_INTERRUPT) stat_regs 7341 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VLINE_INTERRUPT) stat_regs 7345 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d3grph_int & GRPH_PFLIP_INT_OCCURRED) stat_regs 7348 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d4grph_int & GRPH_PFLIP_INT_OCCURRED) stat_regs 7351 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VBLANK_INTERRUPT) stat_regs 7353 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VLINE_INTERRUPT) stat_regs 7355 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VBLANK_INTERRUPT) stat_regs 7357 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VLINE_INTERRUPT) stat_regs 7362 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d5grph_int & GRPH_PFLIP_INT_OCCURRED) stat_regs 7365 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.d6grph_int & GRPH_PFLIP_INT_OCCURRED) stat_regs 7368 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT) stat_regs 7370 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VLINE_INTERRUPT) stat_regs 7372 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VBLANK_INTERRUPT) stat_regs 7374 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VLINE_INTERRUPT) stat_regs 7378 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT) { stat_regs 7383 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_INTERRUPT) { stat_regs 7388 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_INTERRUPT) { stat_regs 7393 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_INTERRUPT) { stat_regs 7398 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_INTERRUPT) { stat_regs 7403 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_INTERRUPT) { stat_regs 7408 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT) { stat_regs 7413 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_RX_INTERRUPT) { stat_regs 7418 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_RX_INTERRUPT) { stat_regs 7423 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_RX_INTERRUPT) { stat_regs 7428 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_RX_INTERRUPT) { stat_regs 7433 drivers/gpu/drm/radeon/cik.c if (rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_RX_INTERRUPT) { stat_regs 7599 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT)) stat_regs 7609 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT; stat_regs 7614 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT)) stat_regs 7617 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VLINE_INTERRUPT; stat_regs 7629 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VBLANK_INTERRUPT)) stat_regs 7639 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT; stat_regs 7644 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont & LB_D2_VLINE_INTERRUPT)) stat_regs 7647 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont &= ~LB_D2_VLINE_INTERRUPT; stat_regs 7659 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VBLANK_INTERRUPT)) stat_regs 7669 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT; stat_regs 7674 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VLINE_INTERRUPT)) stat_regs 7677 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont2 &= ~LB_D3_VLINE_INTERRUPT; stat_regs 7689 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VBLANK_INTERRUPT)) stat_regs 7699 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT; stat_regs 7704 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & LB_D4_VLINE_INTERRUPT)) stat_regs 7707 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont3 &= ~LB_D4_VLINE_INTERRUPT; stat_regs 7719 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT)) stat_regs 7729 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT; stat_regs 7734 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VLINE_INTERRUPT)) stat_regs 7737 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont4 &= ~LB_D5_VLINE_INTERRUPT; stat_regs 7749 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VBLANK_INTERRUPT)) stat_regs 7759 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT; stat_regs 7764 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & LB_D6_VLINE_INTERRUPT)) stat_regs 7767 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont5 &= ~LB_D6_VLINE_INTERRUPT; stat_regs 7789 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT)) stat_regs 7792 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int &= ~DC_HPD1_INTERRUPT; stat_regs 7798 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_INTERRUPT)) stat_regs 7801 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont &= ~DC_HPD2_INTERRUPT; stat_regs 7807 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_INTERRUPT)) stat_regs 7810 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont2 &= ~DC_HPD3_INTERRUPT; stat_regs 7816 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_INTERRUPT)) stat_regs 7819 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont3 &= ~DC_HPD4_INTERRUPT; stat_regs 7825 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_INTERRUPT)) stat_regs 7828 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont4 &= ~DC_HPD5_INTERRUPT; stat_regs 7834 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_INTERRUPT)) stat_regs 7837 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont5 &= ~DC_HPD6_INTERRUPT; stat_regs 7843 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT)) stat_regs 7846 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int &= ~DC_HPD1_RX_INTERRUPT; stat_regs 7852 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont & DC_HPD2_RX_INTERRUPT)) stat_regs 7855 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont &= ~DC_HPD2_RX_INTERRUPT; stat_regs 7861 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont2 & DC_HPD3_RX_INTERRUPT)) stat_regs 7864 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont2 &= ~DC_HPD3_RX_INTERRUPT; stat_regs 7870 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont3 & DC_HPD4_RX_INTERRUPT)) stat_regs 7873 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont3 &= ~DC_HPD4_RX_INTERRUPT; stat_regs 7879 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont4 & DC_HPD5_RX_INTERRUPT)) stat_regs 7882 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont4 &= ~DC_HPD5_RX_INTERRUPT; stat_regs 7888 drivers/gpu/drm/radeon/cik.c if (!(rdev->irq.stat_regs.cik.disp_int_cont5 & DC_HPD6_RX_INTERRUPT)) stat_regs 7891 drivers/gpu/drm/radeon/cik.c rdev->irq.stat_regs.cik.disp_int_cont5 &= ~DC_HPD6_RX_INTERRUPT; stat_regs 4615 drivers/gpu/drm/radeon/evergreen.c u32 *grph_int = rdev->irq.stat_regs.evergreen.grph_int; stat_regs 4616 drivers/gpu/drm/radeon/evergreen.c u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; stat_regs 4617 drivers/gpu/drm/radeon/evergreen.c u32 *afmt_status = rdev->irq.stat_regs.evergreen.afmt_status; stat_regs 4703 drivers/gpu/drm/radeon/evergreen.c u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; stat_regs 4704 drivers/gpu/drm/radeon/evergreen.c u32 *afmt_status = rdev->irq.stat_regs.evergreen.afmt_status; stat_regs 3920 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int = RREG32(DCE3_DISP_INTERRUPT_STATUS); stat_regs 3921 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE); stat_regs 3922 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont2 = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE2); stat_regs 3924 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi0_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET0); stat_regs 3925 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi1_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET1); stat_regs 3927 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi0_status = RREG32(HDMI0_STATUS); stat_regs 3928 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi1_status = RREG32(DCE3_HDMI1_STATUS); stat_regs 3931 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int = RREG32(DISP_INTERRUPT_STATUS); stat_regs 3932 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont = RREG32(DISP_INTERRUPT_STATUS_CONTINUE); stat_regs 3933 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont2 = 0; stat_regs 3934 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi0_status = RREG32(HDMI0_STATUS); stat_regs 3935 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi1_status = RREG32(HDMI1_STATUS); stat_regs 3937 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.d1grph_int = RREG32(D1GRPH_INTERRUPT_STATUS); stat_regs 3938 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.d2grph_int = RREG32(D2GRPH_INTERRUPT_STATUS); stat_regs 3940 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.d1grph_int & DxGRPH_PFLIP_INT_OCCURRED) stat_regs 3942 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.d2grph_int & DxGRPH_PFLIP_INT_OCCURRED) stat_regs 3944 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT) stat_regs 3946 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VLINE_INTERRUPT) stat_regs 3948 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VBLANK_INTERRUPT) stat_regs 3950 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VLINE_INTERRUPT) stat_regs 3952 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & DC_HPD1_INTERRUPT) { stat_regs 3963 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int & DC_HPD2_INTERRUPT) { stat_regs 3974 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int_cont & DC_HPD3_INTERRUPT) { stat_regs 3985 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int_cont & DC_HPD4_INTERRUPT) { stat_regs 3991 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int_cont2 & DC_HPD5_INTERRUPT) { stat_regs 3996 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.disp_int_cont2 & DC_HPD6_INTERRUPT) { stat_regs 4001 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.hdmi0_status & AFMT_AZ_FORMAT_WTRIG) { stat_regs 4006 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.hdmi1_status & AFMT_AZ_FORMAT_WTRIG) { stat_regs 4012 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.hdmi0_status & HDMI0_AZ_FORMAT_WTRIG) { stat_regs 4017 drivers/gpu/drm/radeon/r600.c if (rdev->irq.stat_regs.r600.hdmi1_status & HDMI0_AZ_FORMAT_WTRIG) { stat_regs 4138 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT)) stat_regs 4148 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT; stat_regs 4153 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & LB_D1_VLINE_INTERRUPT)) stat_regs 4156 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VLINE_INTERRUPT; stat_regs 4168 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & LB_D2_VBLANK_INTERRUPT)) stat_regs 4178 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~LB_D2_VBLANK_INTERRUPT; stat_regs 4183 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & LB_D2_VLINE_INTERRUPT)) stat_regs 4186 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~LB_D2_VLINE_INTERRUPT; stat_regs 4208 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & DC_HPD1_INTERRUPT)) stat_regs 4211 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~DC_HPD1_INTERRUPT; stat_regs 4216 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int & DC_HPD2_INTERRUPT)) stat_regs 4219 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int &= ~DC_HPD2_INTERRUPT; stat_regs 4224 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int_cont & DC_HPD3_INTERRUPT)) stat_regs 4227 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont &= ~DC_HPD3_INTERRUPT; stat_regs 4232 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int_cont & DC_HPD4_INTERRUPT)) stat_regs 4235 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont &= ~DC_HPD4_INTERRUPT; stat_regs 4240 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int_cont2 & DC_HPD5_INTERRUPT)) stat_regs 4243 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont2 &= ~DC_HPD5_INTERRUPT; stat_regs 4248 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.disp_int_cont2 & DC_HPD6_INTERRUPT)) stat_regs 4251 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.disp_int_cont2 &= ~DC_HPD6_INTERRUPT; stat_regs 4264 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.hdmi0_status & HDMI0_AZ_FORMAT_WTRIG)) stat_regs 4267 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi0_status &= ~HDMI0_AZ_FORMAT_WTRIG; stat_regs 4273 drivers/gpu/drm/radeon/r600.c if (!(rdev->irq.stat_regs.r600.hdmi1_status & HDMI0_AZ_FORMAT_WTRIG)) stat_regs 4276 drivers/gpu/drm/radeon/r600.c rdev->irq.stat_regs.r600.hdmi1_status &= ~HDMI0_AZ_FORMAT_WTRIG; stat_regs 801 drivers/gpu/drm/radeon/radeon.h union radeon_irq_stat_regs stat_regs; stat_regs 720 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS); stat_regs 721 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { stat_regs 725 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { stat_regs 729 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { stat_regs 734 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { stat_regs 740 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.disp_int = 0; stat_regs 744 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.hdmi0_status = RREG32(R_007404_HDMI0_STATUS) & stat_regs 746 drivers/gpu/drm/radeon/rs600.c if (G_007404_HDMI0_AZ_FORMAT_WTRIG(rdev->irq.stat_regs.r500.hdmi0_status)) { stat_regs 752 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.hdmi0_status = 0; stat_regs 780 drivers/gpu/drm/radeon/rs600.c !rdev->irq.stat_regs.r500.disp_int && stat_regs 781 drivers/gpu/drm/radeon/rs600.c !rdev->irq.stat_regs.r500.hdmi0_status) { stat_regs 785 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.disp_int || stat_regs 786 drivers/gpu/drm/radeon/rs600.c rdev->irq.stat_regs.r500.hdmi0_status) { stat_regs 792 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { stat_regs 801 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { stat_regs 810 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { stat_regs 814 drivers/gpu/drm/radeon/rs600.c if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { stat_regs 818 drivers/gpu/drm/radeon/rs600.c if (G_007404_HDMI0_AZ_FORMAT_WTRIG(rdev->irq.stat_regs.r500.hdmi0_status)) { stat_regs 6148 drivers/gpu/drm/radeon/si.c u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; stat_regs 6149 drivers/gpu/drm/radeon/si.c u32 *grph_int = rdev->irq.stat_regs.evergreen.grph_int; stat_regs 6247 drivers/gpu/drm/radeon/si.c u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int;