SVI2Enable        305 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t                             SVI2Enable;
SVI2Enable        309 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t                             SVI2Enable;
SVI2Enable        293 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     uint8_t                             SVI2Enable;
SVI2Enable        327 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	uint8_t                             SVI2Enable;
SVI2Enable        333 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	uint8_t                             SVI2Enable;
SVI2Enable        372 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t                             SVI2Enable;
SVI2Enable       1887 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->SVI2Enable = 1;
SVI2Enable       1889 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->SVI2Enable = 0;
SVI2Enable       1913 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		tab->SVI2Enable |= VDDC_ON_SVI2;
SVI2Enable       1916 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		tab->SVI2Enable |= VDDCI_ON_SVI2;
SVI2Enable       1921 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		tab->SVI2Enable |= MVDD_ON_SVI2;
SVI2Enable       1923 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	PP_ASSERT_WITH_CODE(tab->SVI2Enable != (VDDC_ON_SVI2 | VDDCI_ON_SVI2 | MVDD_ON_SVI2) &&
SVI2Enable       1924 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		(tab->SVI2Enable & VDDC_ON_SVI2), "SVI2 domain configuration is incorrect!", return -EINVAL);
SVI2Enable       3669 drivers/gpu/drm/radeon/ci_dpm.c 		table->SVI2Enable  = 1;
SVI2Enable       3671 drivers/gpu/drm/radeon/ci_dpm.c 		table->SVI2Enable  = 0;
SVI2Enable        371 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t                             SVI2Enable;