st_l1miss         644 tools/perf/builtin-c2c.c STAT_FN(st_l1miss)
st_l1miss         708 tools/perf/builtin-c2c.c 		   stats->st_l1miss;
st_l1miss         929 tools/perf/builtin-c2c.c PERCENT_FN(st_l1miss)
st_l1miss        1029 tools/perf/builtin-c2c.c 	double per = PERCENT(he, st_l1miss);
st_l1miss        1049 tools/perf/builtin-c2c.c 	per_left  = PERCENT(left, st_l1miss);
st_l1miss        1050 tools/perf/builtin-c2c.c 	per_right = PERCENT(right, st_l1miss);
st_l1miss        2162 tools/perf/builtin-c2c.c 	fprintf(out, "  Store L1D Miss                    : %10d\n", stats->st_l1miss);
st_l1miss         406 tools/perf/util/mem-events.c 			if (lvl & P(LVL, L1)) stats->st_l1miss++;
st_l1miss         432 tools/perf/util/mem-events.c 	stats->st_l1miss	+= add->st_l1miss;
st_l1miss          58 tools/perf/util/mem-events.h 	u32	st_l1miss;           /* count of stores that miss L1D */