ssp1_lock 131 drivers/clk/mmp/clk-of-mmp2.c static DEFINE_SPINLOCK(ssp1_lock); ssp1_lock 147 drivers/clk/mmp/clk-of-mmp2.c {0, "ssp1_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP1, 4, 3, 0, &ssp1_lock}, ssp1_lock 173 drivers/clk/mmp/clk-of-mmp2.c {MMP2_CLK_SSP1, "ssp1_clk", "ssp1_mux", CLK_SET_RATE_PARENT, APBC_SSP1, 0x7, 0x3, 0x0, 0, &ssp1_lock}, ssp1_lock 119 drivers/clk/mmp/clk-of-pxa168.c static DEFINE_SPINLOCK(ssp1_lock); ssp1_lock 135 drivers/clk/mmp/clk-of-pxa168.c {0, "ssp1_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP1, 4, 3, 0, &ssp1_lock}, ssp1_lock 157 drivers/clk/mmp/clk-of-pxa168.c {PXA168_CLK_SSP1, "ssp1_clk", "ssp1_mux", CLK_SET_RATE_PARENT, APBC_SSP1, 0x3, 0x3, 0x0, 0, &ssp1_lock}, ssp1_lock 94 drivers/clk/mmp/clk-of-pxa1928.c static DEFINE_SPINLOCK(ssp1_lock); ssp1_lock 105 drivers/clk/mmp/clk-of-pxa1928.c {0, "ssp1_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, PXA1928_CLK_SSP1 * 4, 4, 3, 0, &ssp1_lock}, ssp1_lock 128 drivers/clk/mmp/clk-of-pxa1928.c {PXA1928_CLK_SSP1, "ssp1_clk", "ssp1_mux", CLK_SET_RATE_PARENT, PXA1928_CLK_SSP1 * 4, 0x3, 0x3, 0x0, 0, &ssp1_lock}, ssp1_lock 119 drivers/clk/mmp/clk-of-pxa910.c static DEFINE_SPINLOCK(ssp1_lock); ssp1_lock 132 drivers/clk/mmp/clk-of-pxa910.c {0, "ssp1_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP1, 4, 3, 0, &ssp1_lock}, ssp1_lock 154 drivers/clk/mmp/clk-of-pxa910.c {PXA910_CLK_SSP1, "ssp1_clk", "ssp1_mux", CLK_SET_RATE_PARENT, APBC_SSP1, 0x3, 0x3, 0x0, 0, &ssp1_lock},