ssp0_lock         130 drivers/clk/mmp/clk-of-mmp2.c static DEFINE_SPINLOCK(ssp0_lock);
ssp0_lock         146 drivers/clk/mmp/clk-of-mmp2.c 	{0, "ssp0_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP0, 4, 3, 0, &ssp0_lock},
ssp0_lock         172 drivers/clk/mmp/clk-of-mmp2.c 	{MMP2_CLK_SSP0, "ssp0_clk", "ssp0_mux", CLK_SET_RATE_PARENT, APBC_SSP0, 0x7, 0x3, 0x0, 0, &ssp0_lock},
ssp0_lock         118 drivers/clk/mmp/clk-of-pxa168.c static DEFINE_SPINLOCK(ssp0_lock);
ssp0_lock         134 drivers/clk/mmp/clk-of-pxa168.c 	{0, "ssp0_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP0, 4, 3, 0, &ssp0_lock},
ssp0_lock         156 drivers/clk/mmp/clk-of-pxa168.c 	{PXA168_CLK_SSP0, "ssp0_clk", "ssp0_mux", CLK_SET_RATE_PARENT, APBC_SSP0, 0x3, 0x3, 0x0, 0, &ssp0_lock},
ssp0_lock          93 drivers/clk/mmp/clk-of-pxa1928.c static DEFINE_SPINLOCK(ssp0_lock);
ssp0_lock         104 drivers/clk/mmp/clk-of-pxa1928.c 	{0, "ssp0_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, PXA1928_CLK_SSP0 * 4, 4, 3, 0, &ssp0_lock},
ssp0_lock         127 drivers/clk/mmp/clk-of-pxa1928.c 	{PXA1928_CLK_SSP0, "ssp0_clk", "ssp0_mux", CLK_SET_RATE_PARENT, PXA1928_CLK_SSP0 * 4, 0x3, 0x3, 0x0, 0, &ssp0_lock},
ssp0_lock         118 drivers/clk/mmp/clk-of-pxa910.c static DEFINE_SPINLOCK(ssp0_lock);
ssp0_lock         131 drivers/clk/mmp/clk-of-pxa910.c 	{0, "ssp0_mux", ssp_parent_names, ARRAY_SIZE(ssp_parent_names), CLK_SET_RATE_PARENT, APBC_SSP0, 4, 3, 0, &ssp0_lock},
ssp0_lock         153 drivers/clk/mmp/clk-of-pxa910.c 	{PXA910_CLK_SSP0, "ssp0_clk", "ssp0_mux", CLK_SET_RATE_PARENT, APBC_SSP0, 0x3, 0x3, 0x0, 0, &ssp0_lock},