ss_parm            68 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	struct spread_spectrum_data *ss_parm = NULL;
ss_parm            74 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		ss_parm = clk_src->dvi_ss_params;
ss_parm            79 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		ss_parm = clk_src->hdmi_ss_params;
ss_parm            84 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		ss_parm = clk_src->lvds_ss_params;
ss_parm            92 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		ss_parm = clk_src->dp_ss_params;
ss_parm            97 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		ss_parm = NULL;
ss_parm           102 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	if (ss_parm == NULL)
ss_parm           105 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 	for (i = 0; i < entrys_num; ++i, ++ss_parm) {
ss_parm           106 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 		if (ss_parm->freq_range_khz >= pix_clk_khz) {
ss_parm           107 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c 			ret = ss_parm;