ss_info_cur 1096 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c struct spread_spectrum_info *ss_info_cur; ss_info_cur 1124 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ss_info_cur = ss_info; ss_info_cur 1134 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c for (i = 0, ss_info_cur = ss_info; ss_info_cur 1136 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ++i, ++ss_info_cur) { ss_info_cur 1142 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ss_info_cur); ss_info_cur 1148 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c for (i = 0, ss_info_cur = ss_info, ss_data_cur = ss_data; ss_info_cur 1150 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ++i, ++ss_info_cur, ++ss_data_cur) { ss_info_cur 1152 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c if (ss_info_cur->type.STEP_AND_DELAY_INFO != false) { ss_info_cur 1161 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c && ss_info_cur->spread_spectrum_percentage > 6){ ss_info_cur 1169 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c if (ss_info_cur->spread_percentage_divider == 1000) { ss_info_cur 1177 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ss_info_cur->spread_spectrum_percentage /= 10; ss_info_cur 1178 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ss_info_cur->spread_percentage_divider = 100; ss_info_cur 1181 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ss_data_cur->freq_range_khz = ss_info_cur->target_clock_range; ss_info_cur 1183 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ss_info_cur->spread_spectrum_percentage; ss_info_cur 1185 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ss_info_cur->spread_percentage_divider; ss_info_cur 1187 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ss_info_cur->spread_spectrum_range; ss_info_cur 1189 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c if (ss_info_cur->type.CENTER_MODE) ss_info_cur 1192 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c if (ss_info_cur->type.EXTERNAL)