src_width 75 drivers/clk/qcom/apcs-msm8916.c a53cc->src_width = 3; src_width 31 drivers/clk/qcom/clk-regmap-mux-div.c ((BIT(md->src_width) - 1) << md->src_shift); src_width 74 drivers/clk/qcom/clk-regmap-mux-div.c s &= BIT(md->src_width) - 1; src_width 31 drivers/clk/qcom/clk-regmap-mux-div.h u32 src_width; src_width 41 drivers/clk/renesas/clk-div6.c u32 src_width; src_width 136 drivers/clk/renesas/clk-div6.c if (clock->src_width == 0) src_width 140 drivers/clk/renesas/clk-div6.c (BIT(clock->src_width) - 1); src_width 160 drivers/clk/renesas/clk-div6.c mask = ~((BIT(clock->src_width) - 1) << clock->src_shift); src_width 239 drivers/clk/renesas/clk-div6.c clock->src_shift = clock->src_width = 0; src_width 244 drivers/clk/renesas/clk-div6.c clock->src_width = 2; src_width 249 drivers/clk/renesas/clk-div6.c clock->src_width = 3; src_width 287 drivers/dma/at_hdmac.c u32 src_width = ATC_REG_TO_SRC_WIDTH(ctrla); src_width 295 drivers/dma/at_hdmac.c return current_len - (btsize << src_width); src_width 810 drivers/dma/at_hdmac.c unsigned int src_width; src_width 832 drivers/dma/at_hdmac.c src_width = dst_width = atc_get_xfer_width(src, dest, len); src_width 834 drivers/dma/at_hdmac.c ctrla = ATC_SRC_WIDTH(src_width) | src_width 837 drivers/dma/at_hdmac.c for (offset = 0; offset < len; offset += xfer_count << src_width) { src_width 838 drivers/dma/at_hdmac.c xfer_count = min_t(size_t, (len - offset) >> src_width, src_width 851 drivers/dma/at_hdmac.c desc->len = xfer_count << src_width; src_width 115 drivers/dma/dma-axi-dmac.c unsigned int src_width; src_width 756 drivers/dma/dma-axi-dmac.c chan->src_width = val / 8; src_width 763 drivers/dma/dma-axi-dmac.c chan->address_align_mask = max(chan->dest_width, chan->src_width) - 1; src_width 888 drivers/dma/dma-axi-dmac.c dma_dev->src_addr_widths = BIT(dmac->chan.src_width); src_width 556 drivers/dma/dw/core.c unsigned int src_width; src_width 573 drivers/dma/dw/core.c src_width = dst_width = __ffs(data_width | src | dest | len); src_width 577 drivers/dma/dw/core.c | DWC_CTLL_SRC_WIDTH(src_width) src_width 588 drivers/dma/dw/core.c ctlhi = dw->bytes2block(dwc, len - offset, src_width, &xfer_count); src_width 237 drivers/dma/idma64.c u32 src_width, dst_width; src_width 244 drivers/dma/idma64.c src_width = __ffs(sar | hw->len | 4); src_width 251 drivers/dma/idma64.c src_width = __ffs(config->src_addr_width); src_width 263 drivers/dma/idma64.c IDMA64C_CTLL_SRC_WIDTH(src_width); src_width 585 drivers/dma/sun6i-dma.c s8 src_width, dst_width, src_burst, dst_burst; src_width 616 drivers/dma/sun6i-dma.c src_width = convert_buswidth(src_addr_width); src_width 621 drivers/dma/sun6i-dma.c *p_cfg = DMA_CHAN_CFG_SRC_WIDTH(src_width) | src_width 462 drivers/dma/zx_dma.c enum zx_dma_burst_width src_width; src_width 491 drivers/dma/zx_dma.c src_width = zx_dma_burst_width(cfg->src_addr_width); src_width 497 drivers/dma/zx_dma.c | ZX_SRC_BURST_WIDTH(src_width) src_width 498 drivers/dma/zx_dma.c | ZX_DST_BURST_WIDTH(src_width); src_width 694 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c u32 src_width; /* viewport width */ src_width 859 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fixed20_12 src_width; src_width 867 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c src_width.full = dfixed_const(wm->src_width); src_width 868 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c bandwidth.full = dfixed_mul(src_width, bpp); src_width 920 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); src_width 985 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c u32 lb_partitions = wm->lb_size / wm->src_width; src_width 1050 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c wm_high.src_width = mode->crtc_hdisplay; src_width 1089 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c wm_low.src_width = mode->crtc_hdisplay; src_width 720 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c u32 src_width; /* viewport width */ src_width 885 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fixed20_12 src_width; src_width 893 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c src_width.full = dfixed_const(wm->src_width); src_width 894 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c bandwidth.full = dfixed_mul(src_width, bpp); src_width 946 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); src_width 1011 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c u32 lb_partitions = wm->lb_size / wm->src_width; src_width 1076 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c wm_high.src_width = mode->crtc_hdisplay; src_width 1115 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c wm_low.src_width = mode->crtc_hdisplay; src_width 493 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c u32 src_width; /* viewport width */ src_width 658 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c fixed20_12 src_width; src_width 666 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c src_width.full = dfixed_const(wm->src_width); src_width 667 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c bandwidth.full = dfixed_mul(src_width, bpp); src_width 719 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); src_width 784 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c u32 lb_partitions = wm->lb_size / wm->src_width; src_width 858 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c wm_high.src_width = mode->crtc_hdisplay; src_width 885 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c wm_low.src_width = mode->crtc_hdisplay; src_width 629 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c u32 src_width; /* viewport width */ src_width 794 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c fixed20_12 src_width; src_width 802 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c src_width.full = dfixed_const(wm->src_width); src_width 803 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c bandwidth.full = dfixed_mul(src_width, bpp); src_width 855 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); src_width 920 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c u32 lb_partitions = wm->lb_size / wm->src_width; src_width 985 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c wm_high.src_width = mode->crtc_hdisplay; src_width 1024 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c wm_low.src_width = mode->crtc_hdisplay; src_width 423 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] src_width[%d]:%d", i, bw_fixed_to_int(data->src_width[i])); src_width 388 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->src_width[maximum_number_of_surfaces - 2] = data->src_width[5]; src_width 389 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->src_width[maximum_number_of_surfaces - 1] = data->src_width[5]; src_width 392 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->pitch_in_pixels[maximum_number_of_surfaces - 2] = data->src_width[5]; src_width 393 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->pitch_in_pixels[maximum_number_of_surfaces - 1] = data->src_width[5]; src_width 426 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->src_width_after_surface_type = bw_div(data->src_width[i], bw_int_to_fixed(2)); src_width 433 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->src_width_after_surface_type = data->src_width[i]; src_width 2799 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.width); src_width 2800 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->pitch_in_pixels[num_displays + 4] = data->src_width[num_displays + 4]; src_width 2854 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->src_width[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.viewport.width); src_width 2901 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.width); src_width 2902 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->pitch_in_pixels[num_displays + 4] = data->src_width[num_displays + 4]; src_width 2952 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->src.width); src_width 2953 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->pitch_in_pixels[num_displays + 4] = data->src_width[num_displays + 4]; src_width 2962 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->timing.h_addressable); src_width 2963 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->pitch_in_pixels[num_displays + 4] = data->src_width[num_displays + 4]; src_width 150 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c cfg->src_width = stream->src.width; src_width 435 drivers/gpu/drm/amd/display/dc/dc_types.h unsigned int src_width; /* input active width */ src_width 522 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c cfg->src_width = stream->src.width; src_width 78 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c REG_UPDATE_2(CNV_SOURCE_SIZE, CNV_SOURCE_WIDTH, params->cnv_params.src_width, src_width 104 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c if ((params->cnv_params.src_width != params->dest_width) || src_width 164 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c if ((params->cnv_params.src_width != params->dest_width) || src_width 290 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c dwb_program_horz_scalar(dwbc20, params->cnv_params.src_width, src_width 451 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.h uint32_t src_width, src_width 720 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c uint32_t src_width, src_width 744 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c src_width, dest_width); src_width 128 drivers/gpu/drm/amd/display/dc/dm_services_types.h uint32_t src_width; src_width 391 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h struct bw_fixed src_width[maximum_number_of_surfaces]; src_width 793 drivers/gpu/drm/i915/display/intel_overlay.c params->src_width); src_width 795 drivers/gpu/drm/i915/display/intel_overlay.c tmp_width = params->src_width; src_width 797 drivers/gpu/drm/i915/display/intel_overlay.c swidth = params->src_width; src_width 808 drivers/gpu/drm/i915/display/intel_overlay.c swidth |= (params->src_width / uv_hscale) << 16; src_width 812 drivers/gpu/drm/i915/display/intel_overlay.c params->src_width / uv_hscale); src_width 814 drivers/gpu/drm/i915/display/intel_overlay.c params->src_width / uv_hscale); src_width 954 drivers/gpu/drm/i915/display/intel_overlay.c rec->src_width > IMAGE_MAX_WIDTH_LEGACY) src_width 958 drivers/gpu/drm/i915/display/intel_overlay.c rec->src_width > IMAGE_MAX_WIDTH) src_width 964 drivers/gpu/drm/i915/display/intel_overlay.c rec->src_width < N_HORIZ_Y_TAPS*4) src_width 1000 drivers/gpu/drm/i915/display/intel_overlay.c if (rec->src_width % uv_hscale) src_width 1024 drivers/gpu/drm/i915/display/intel_overlay.c if (packed_width_bytes(rec->flags, rec->src_width) > rec->stride_Y) src_width 1033 drivers/gpu/drm/i915/display/intel_overlay.c if (rec->src_width > rec->stride_Y) src_width 1035 drivers/gpu/drm/i915/display/intel_overlay.c if (rec->src_width/uv_hscale > rec->stride_UV) src_width 1137 drivers/gpu/drm/i915/display/intel_overlay.c params->src_scan_width > params->src_width) { src_width 231 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c src_y_rgb = (scaler3_cfg->src_width[0] & 0x1FFFF) | src_width 234 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c src_uv = (scaler3_cfg->src_width[1] & 0x1FFFF) | src_width 111 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h u32 src_width[DPU_MAX_PLANES]; src_width 271 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h uint32_t src_width[DPU_MAX_PLANES]; src_width 137 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c const struct dpu_format *fmt, u32 src_width) src_width 144 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (!fmt || !plane->state || !src_width || !fmt->bpp) { src_width 158 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c src_width, src_width 160 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c src_width = max_t(u32, src_width, src_width 168 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c ((src_width + 32) * fmt->bpp); src_width 172 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c ((src_width + 32) * fmt->bpp); src_width 177 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c ((src_width + 32) * fmt->bpp); src_width 180 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c ((src_width + 32) * fmt->bpp); src_width 187 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c src_width, total_fl); src_width 474 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c scale_cfg->src_width[i] = src_w; src_width 477 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c scale_cfg->src_width[i] /= chroma_subsmpl_h; src_width 485 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c scale_cfg->src_width[i]; src_width 8924 drivers/gpu/drm/radeon/cik.c u32 src_width; /* viewport width */ src_width 9089 drivers/gpu/drm/radeon/cik.c fixed20_12 src_width; src_width 9097 drivers/gpu/drm/radeon/cik.c src_width.full = dfixed_const(wm->src_width); src_width 9098 drivers/gpu/drm/radeon/cik.c bandwidth.full = dfixed_mul(src_width, bpp); src_width 9150 drivers/gpu/drm/radeon/cik.c a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); src_width 9215 drivers/gpu/drm/radeon/cik.c u32 lb_partitions = wm->lb_size / wm->src_width; src_width 9281 drivers/gpu/drm/radeon/cik.c wm_high.src_width = mode->crtc_hdisplay; src_width 9321 drivers/gpu/drm/radeon/cik.c wm_low.src_width = mode->crtc_hdisplay; src_width 1936 drivers/gpu/drm/radeon/evergreen.c u32 src_width; /* viewport width */ src_width 2045 drivers/gpu/drm/radeon/evergreen.c fixed20_12 src_width; src_width 2053 drivers/gpu/drm/radeon/evergreen.c src_width.full = dfixed_const(wm->src_width); src_width 2054 drivers/gpu/drm/radeon/evergreen.c bandwidth.full = dfixed_mul(src_width, bpp); src_width 2094 drivers/gpu/drm/radeon/evergreen.c a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); src_width 2128 drivers/gpu/drm/radeon/evergreen.c u32 lb_partitions = wm->lb_size / wm->src_width; src_width 2191 drivers/gpu/drm/radeon/evergreen.c wm_high.src_width = mode->crtc_hdisplay; src_width 2218 drivers/gpu/drm/radeon/evergreen.c wm_low.src_width = mode->crtc_hdisplay; src_width 2062 drivers/gpu/drm/radeon/si.c u32 src_width; /* viewport width */ src_width 2188 drivers/gpu/drm/radeon/si.c fixed20_12 src_width; src_width 2196 drivers/gpu/drm/radeon/si.c src_width.full = dfixed_const(wm->src_width); src_width 2197 drivers/gpu/drm/radeon/si.c bandwidth.full = dfixed_mul(src_width, bpp); src_width 2240 drivers/gpu/drm/radeon/si.c a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); src_width 2274 drivers/gpu/drm/radeon/si.c u32 lb_partitions = wm->lb_size / wm->src_width; src_width 2340 drivers/gpu/drm/radeon/si.c wm_high.src_width = mode->crtc_hdisplay; src_width 2367 drivers/gpu/drm/radeon/si.c wm_low.src_width = mode->crtc_hdisplay; src_width 144 drivers/iio/buffer/industrialio-buffer-dmaengine.c unsigned int width, src_width, dest_width; src_width 165 drivers/iio/buffer/industrialio-buffer-dmaengine.c src_width = __ffs(caps.src_addr_widths); src_width 167 drivers/iio/buffer/industrialio-buffer-dmaengine.c src_width = 1; src_width 172 drivers/iio/buffer/industrialio-buffer-dmaengine.c width = max(src_width, dest_width); src_width 92 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->scaled_width = tpg->src_width = w; src_width 476 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->scaled_width = (tpg->src_width * tpg->compose.width + src_width 492 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->src_width = width; src_width 1613 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return bars[tpg->pattern][((x * 8) / tpg->src_width) % 8]; src_width 1615 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return bars[1][(pat_line + (x * 8) / tpg->src_width) % 8]; src_width 1648 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (pat_line || (x % tpg->src_width) == tpg->src_width / 2) src_width 1652 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (pat_line || ((x % tpg->src_width) + 1) / 2 == tpg->src_width / 4) src_width 1656 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c if (pat_line || ((x % tpg->src_width) + 10) / 20 == tpg->src_width / 40) src_width 1660 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c return TPG_COLOR_RAMP + ((x % tpg->src_width) * 256) / tpg->src_width; src_width 1674 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned w = tpg->src_width; src_width 1774 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned int_part = tpg->src_width / tpg->scaled_width; src_width 1775 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c unsigned fract_part = tpg->src_width % tpg->scaled_width; src_width 1783 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c real_x = tpg->hflip ? tpg->src_width * 2 - real_x - 2 : real_x; src_width 1794 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c real_x = tpg->hflip ? tpg->src_width * 2 - real_x - 2 : real_x; src_width 2018 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->mv_hor_step = ((tpg->src_width + 319) / 320) * 4; src_width 2022 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->mv_hor_step = ((tpg->src_width + 639) / 640) * 4; src_width 2033 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->mv_hor_step = tpg->src_width - tpg->mv_hor_step; src_width 2039 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->mv_vert_step = ((tpg->src_width + 319) / 320) * 4; src_width 2043 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->mv_vert_step = ((tpg->src_width + 639) / 640) * 4; src_width 2182 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->src_width, tpg->src_height, src_width 2235 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg_hscale_div(tpg, p, tpg->mv_hor_count % tpg->src_width); src_width 2238 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->src_width); src_width 2251 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c params->wss_width = tpg->crop.left < tpg->src_width / 2 ? src_width 2252 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c tpg->src_width / 2 - tpg->crop.left : 0; src_width 2257 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c params->twopixsize * prandom_u32_max(tpg->src_width / 2); src_width 2428 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c twopixsize * prandom_u32_max(tpg->src_width / 2); src_width 2430 drivers/media/common/v4l2-tpg/v4l2-tpg-core.c twopixsize * prandom_u32_max(tpg->src_width / 2); src_width 987 drivers/media/pci/ivtv/ivtv-yuv.c nf->tru_w = args->src_width; src_width 1124 drivers/media/pci/ivtv/ivtv-yuv.c dma_args.src_width = yi->v4l2_src_w; src_width 725 drivers/media/platform/imx-pxp.c u32 src_width, src_height, src_stride, src_fourcc; src_width 737 drivers/media/platform/imx-pxp.c src_width = ctx->q_data[V4L2_M2M_SRC].width; src_width 800 drivers/media/platform/imx-pxp.c decx = (src_width <= dst_width) ? 0 : ilog2(src_width / dst_width); src_width 835 drivers/media/platform/imx-pxp.c xscale = (src_width >> decx) * 0x1000 / dst_width; src_width 852 drivers/media/platform/imx-pxp.c xscale = (src_width - 2) * 0x1000 / (dst_width - 1); src_width 855 drivers/media/platform/imx-pxp.c xscale = (src_width - 1) * 0x1000 / (dst_width - 1); src_width 747 drivers/media/platform/sh_veu.c u32 src_width, src_stride, src_height; src_width 754 drivers/media/platform/sh_veu.c src_width = veu->vfmt_in.frame.width; src_width 768 drivers/media/platform/sh_veu.c src_width = sh_veu_scale_h(veu, src_width, real_w, dst_width); src_width 772 drivers/media/platform/sh_veu.c sh_veu_reg_write(veu, VEU_SSR, src_width | (src_height << 16)); src_width 219 drivers/sh/clk/cpg.c if (!clk->src_width) { src_width 225 drivers/sh/clk/cpg.c val &= (1 << clk->src_width) - 1; src_width 316 drivers/sh/clk/cpg.c ~(((1 << clk->src_width) - 1) << clk->src_shift); src_width 44 include/linux/sh_clk.h unsigned char src_width; /* configuration register */ src_width 185 include/linux/sh_clk.h .src_width = _src_width, \ src_width 135 include/media/tpg/v4l2-tpg.h unsigned src_width, src_height; src_width 445 include/media/tpg/v4l2-tpg.h return (x * tpg->scaled_width) / tpg->src_width; src_width 1407 include/uapi/drm/i915_drm.h __u16 src_width; src_width 58 include/uapi/linux/ivtv.h __u32 src_width; src_width 1342 sound/core/oss/pcm_oss.c size_t oss_frame_bytes = (runtime->oss.plugin_first->src_width * runtime->oss.plugin_first->src_format.channels) / 8; src_width 168 sound/core/oss/pcm_plugin.c plugin->src_width = snd_pcm_format_physical_width(src_format->format); src_width 169 sound/core/oss/pcm_plugin.c snd_BUG_ON(plugin->src_width <= 0); src_width 44 sound/core/oss/pcm_plugin.h int src_width; /* sample width in bits */ src_width 1407 tools/include/uapi/drm/i915_drm.h __u16 src_width;