src_w 30 arch/openrisc/lib/memcpy.c uint32_t *dest_w = (uint32_t *)dest, *src_w = (uint32_t *)src; src_w 33 arch/openrisc/lib/memcpy.c if (!((unsigned int)dest_w & 3) && !((unsigned int)src_w & 3)) { src_w 36 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 37 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 38 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 39 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 40 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 41 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 42 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 43 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 47 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 48 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 49 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 50 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 54 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 55 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 59 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 62 arch/openrisc/lib/memcpy.c s = (unsigned char *)src_w; src_w 66 arch/openrisc/lib/memcpy.c s = (unsigned char *)src_w; src_w 105 arch/openrisc/lib/memcpy.c uint32_t *dest_w = (uint32_t *)dest, *src_w = (uint32_t *)src; src_w 108 arch/openrisc/lib/memcpy.c if (!((unsigned int)dest_w & 3) && !((unsigned int)src_w & 3)) { src_w 110 arch/openrisc/lib/memcpy.c *dest_w++ = *src_w++; src_w 114 arch/openrisc/lib/memcpy.c s = (unsigned char *)src_w; src_w 2624 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c scaling_info->src_rect.width = state->src_w >> 16; src_w 4636 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->src_w = new_state->src_w; src_w 209 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c u32 src_x, u32 src_y, u32 src_w, u32 src_h) src_w 216 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c if ((src_x + src_w > fb->width) || (src_y + src_h > fb->height)) { src_w 221 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c if ((src_x % info->hsub) || (src_w % info->hsub) || src_w 224 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c src_x, src_y, src_w, src_h, info->format); src_w 228 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c if ((src_x % block_w) || (src_w % block_w) || src_w 231 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c src_x, src_y, src_w, src_h, info->format); src_w 42 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h u32 src_x, u32 src_y, u32 src_w, u32 src_h); src_w 287 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c u32 src_x, src_y, src_w, src_h; src_w 295 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c src_w = dflow->out_w; src_w 300 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c src_w = dflow->in_w; src_w 304 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c if (komeda_fb_check_src_coords(kfb, src_x, src_y, src_w, src_h)) src_w 307 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c if (!in_range(&layer->hsize_in, src_w)) { src_w 308 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c DRM_DEBUG_ATOMIC("invalidate src_w %d.\n", src_w); src_w 47 drivers/gpu/drm/arm/display/komeda/komeda_plane.c dflow->in_w = st->src_w >> 16; src_w 283 drivers/gpu/drm/arm/malidp_crtc.c pstate->src_w); src_w 292 drivers/gpu/drm/arm/malidp_crtc.c s->input_h = pstate->src_w >> 16; src_w 294 drivers/gpu/drm/arm/malidp_crtc.c s->input_w = pstate->src_w >> 16; src_w 276 drivers/gpu/drm/arm/malidp_planes.c u32 src_w, src_h; src_w 290 drivers/gpu/drm/arm/malidp_planes.c src_w = state->src_h >> 16; src_w 291 drivers/gpu/drm/arm/malidp_planes.c src_h = state->src_w >> 16; src_w 293 drivers/gpu/drm/arm/malidp_planes.c src_w = state->src_w >> 16; src_w 297 drivers/gpu/drm/arm/malidp_planes.c if ((state->crtc_w == src_w) && (state->crtc_h == src_h)) { src_w 752 drivers/gpu/drm/arm/malidp_planes.c u32 src_w, src_h, val = 0, src_x, src_y; src_w 767 drivers/gpu/drm/arm/malidp_planes.c src_w = plane->state->src_w >> 16; src_w 772 drivers/gpu/drm/arm/malidp_planes.c val = ((fb->width - (src_x + src_w)) << MALIDP_AD_CROP_RIGHT_OFFSET) | src_w 799 drivers/gpu/drm/arm/malidp_planes.c u32 src_w, src_h, dest_w, dest_h, val; src_w 810 drivers/gpu/drm/arm/malidp_planes.c src_w = fb->width; src_w 814 drivers/gpu/drm/arm/malidp_planes.c src_w = state->src_w >> 16; src_w 838 drivers/gpu/drm/arm/malidp_planes.c malidp_hw_write(mp->hwdev, LAYER_H_VAL(src_w) | LAYER_V_VAL(src_h), src_w 856 drivers/gpu/drm/arm/malidp_planes.c LAYER_H_VAL(src_w) | LAYER_V_VAL(src_h), src_w 254 drivers/gpu/drm/armada/armada_overlay.c uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, src_w 263 drivers/gpu/drm/armada/armada_overlay.c src_x, src_y, src_w, src_h); src_w 288 drivers/gpu/drm/armada/armada_overlay.c plane_state->src_w = src_w; src_w 34 drivers/gpu/drm/armada/armada_trace.h uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h), src_w 35 drivers/gpu/drm/armada/armada_trace.h TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h), src_w 46 drivers/gpu/drm/armada/armada_trace.h __field(u32, src_w) src_w 59 drivers/gpu/drm/armada/armada_trace.h __entry->src_w = src_w; src_w 67 drivers/gpu/drm/armada/armada_trace.h __entry->src_w >> 16, __entry->src_h >> 16) src_w 52 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c uint32_t src_w; src_w 292 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (state->crtc_w == state->src_w && state->crtc_h == state->src_h) { src_w 299 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c xfactor = atmel_hlcdc_plane_phiscaler_get_factor(state->src_w, src_w 308 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->crtc_w < state->src_w ? src_w 321 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c xfactor = (1024 * state->src_w) / state->crtc_w; src_w 345 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c ATMEL_HLCDC_LAYER_SIZE(state->src_w, src_w 499 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c pixels = (plane_state->src_w * plane_state->src_h) - src_w 622 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->src_w = drm_rect_width(&s->src); src_w 629 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if ((state->src_x | state->src_y | state->src_w | state->src_h) & src_w 635 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->src_w >>= 16; src_w 655 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c offset += ((state->src_x + state->src_w - 1) / src_w 665 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c offset += ((state->src_x + state->src_w - 1) / src_w 667 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->xstride[i] = ((((state->src_w - 1) / xdiv) - 1) * src_w 684 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c ((state->src_w / xdiv) * src_w 697 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c tmp = state->src_w; src_w 698 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->src_w = state->src_h; src_w 707 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if ((state->crtc_h != state->src_h || state->crtc_w != state->src_w) && src_w 601 drivers/gpu/drm/drm_atomic.c if (new_plane_state->src_w > fb_width || src_w 602 drivers/gpu/drm/drm_atomic.c new_plane_state->src_x > fb_width - new_plane_state->src_w || src_w 608 drivers/gpu/drm/drm_atomic.c new_plane_state->src_w >> 16, src_w 609 drivers/gpu/drm/drm_atomic.c ((new_plane_state->src_w & 0xffff) * 15625) >> 10, src_w 1275 drivers/gpu/drm/drm_atomic.c plane_state->src_w = 0; src_w 1410 drivers/gpu/drm/drm_atomic.c primary_state->src_w = vdisplay << 16; src_w 1413 drivers/gpu/drm/drm_atomic.c primary_state->src_w = hdisplay << 16; src_w 2834 drivers/gpu/drm/drm_atomic_helper.c uint32_t src_w, uint32_t src_h, src_w 2862 drivers/gpu/drm/drm_atomic_helper.c plane_state->src_w = src_w; src_w 558 drivers/gpu/drm/drm_atomic_uapi.c state->src_w = val; src_w 626 drivers/gpu/drm/drm_atomic_uapi.c *val = state->src_w; src_w 198 drivers/gpu/drm/drm_crtc_internal.h uint32_t src_w, uint32_t src_h, src_w 76 drivers/gpu/drm/drm_framebuffer.c uint32_t src_w, uint32_t src_h, src_w 85 drivers/gpu/drm/drm_framebuffer.c if (src_w > fb_width || src_w 86 drivers/gpu/drm/drm_framebuffer.c src_x > fb_width - src_w || src_w 91 drivers/gpu/drm/drm_framebuffer.c src_w >> 16, ((src_w & 0xffff) * 15625) >> 10, src_w 602 drivers/gpu/drm/drm_plane.c uint32_t src_w, uint32_t src_h) src_w 635 drivers/gpu/drm/drm_plane.c ret = drm_framebuffer_check_src_coords(src_x, src_y, src_w, src_h, fb); src_w 680 drivers/gpu/drm/drm_plane.c uint32_t src_w, uint32_t src_h, src_w 702 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h); src_w 709 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h, ctx); src_w 732 drivers/gpu/drm/drm_plane.c uint32_t src_w, uint32_t src_h, src_w 752 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h); src_w 758 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h, ctx); src_w 768 drivers/gpu/drm/drm_plane.c uint32_t src_w, uint32_t src_h) src_w 779 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h, &ctx); src_w 783 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h, &ctx); src_w 834 drivers/gpu/drm/drm_plane.c plane_req->src_w, plane_req->src_h); src_w 859 drivers/gpu/drm/drm_plane.c uint32_t src_w = 0, src_h = 0; src_w 904 drivers/gpu/drm/drm_plane.c src_w = fb->width << 16; src_w 911 drivers/gpu/drm/drm_plane.c 0, 0, src_w, src_h, ctx); src_w 915 drivers/gpu/drm/drm_plane.c 0, 0, src_w, src_h, ctx); src_w 1146 drivers/gpu/drm/drm_plane.c state->src_w, src_w 119 drivers/gpu/drm/drm_plane_helper.c .src_w = drm_rect_width(src), src_w 154 drivers/gpu/drm/drm_plane_helper.c uint32_t src_w, uint32_t src_h, src_w 167 drivers/gpu/drm/drm_plane_helper.c .x2 = src_x + src_w, src_w 168 drivers/gpu/drm/drm_rect.c int src_w = drm_rect_width(src); src_w 170 drivers/gpu/drm/drm_rect.c int hscale = drm_calc_scale(src_w, dst_w); src_w 746 drivers/gpu/drm/exynos/exynos_drm_fimc.c u32 src_w, src_h, dst_w, dst_h; src_w 750 drivers/gpu/drm/exynos/exynos_drm_fimc.c src_w = src->h; src_w 753 drivers/gpu/drm/exynos/exynos_drm_fimc.c src_w = src->w; src_w 766 drivers/gpu/drm/exynos/exynos_drm_fimc.c hfactor = fls(src_w / dst_w / 2); src_w 778 drivers/gpu/drm/exynos/exynos_drm_fimc.c pre_dst_width = src_w >> hfactor; src_w 785 drivers/gpu/drm/exynos/exynos_drm_fimc.c sc->hratio = (src_w << 14) / (dst_w << hfactor); src_w 787 drivers/gpu/drm/exynos/exynos_drm_fimc.c sc->up_h = (dst_w >= src_w) ? true : false; src_w 748 drivers/gpu/drm/exynos/exynos_drm_gsc.c u32 src_w, src_h, dst_w, dst_h; src_w 751 drivers/gpu/drm/exynos/exynos_drm_gsc.c src_w = src->w; src_w 762 drivers/gpu/drm/exynos/exynos_drm_gsc.c ret = gsc_get_ratio_shift(ctx, src_w, dst_w, &sc->pre_hratio); src_w 777 drivers/gpu/drm/exynos/exynos_drm_gsc.c sc->main_hratio = (src_w << 16) / dst_w; src_w 65 drivers/gpu/drm/exynos/exynos_drm_plane.c unsigned int src_w, src_h; src_w 82 drivers/gpu/drm/exynos/exynos_drm_plane.c src_w = state->src_w >> 16; src_w 86 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->h_ratio = (src_w << 16) / crtc_w; src_w 63 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c u32 src_w = state->src_w >> 16; src_w 73 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c if (src_w != state->crtc_w || src_h != state->crtc_h) { src_w 713 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c u32 src_y, u32 src_w, u32 src_h) src_w 723 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c ch + 1, src_x, src_y, src_w, src_h, src_w 727 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c in_w = src_w; src_w 768 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c u32 src_w = state->src_w >> 16; src_w 787 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c if (src_w != crtc_w || src_h != crtc_h) { src_w 791 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c if (src_x + src_w > fb->width || src_w 814 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c state->src_w >> 16, state->src_h >> 16); src_w 2804 drivers/gpu/drm/i915/display/intel_display.c unsigned int src_w, src_h; src_w 2813 drivers/gpu/drm/i915/display/intel_display.c src_w = drm_rect_width(&plane_state->base.src) >> 16; src_w 2825 drivers/gpu/drm/i915/display/intel_display.c src_w << 16, src_h << 16, src_w 2842 drivers/gpu/drm/i915/display/intel_display.c width = src_w / hsub; src_w 3256 drivers/gpu/drm/i915/display/intel_display.c plane_state->src_w = fb->width << 16; src_w 3705 drivers/gpu/drm/i915/display/intel_display.c int src_w = drm_rect_width(&plane_state->base.src) >> 16; src_w 3709 drivers/gpu/drm/i915/display/intel_display.c src_x += src_w - 1; src_w 3712 drivers/gpu/drm/i915/display/intel_display.c src_x += src_w - 1; src_w 5410 drivers/gpu/drm/i915/display/intel_display.c int src_w, int src_h, int dst_w, int dst_h, src_w 5426 drivers/gpu/drm/i915/display/intel_display.c if (src_w != dst_w || src_h != dst_h) src_w 5466 drivers/gpu/drm/i915/display/intel_display.c (src_h < SKL_MIN_YUV_420_SRC_H || src_w < SKL_MIN_YUV_420_SRC_W)) { src_w 5472 drivers/gpu/drm/i915/display/intel_display.c if (src_w < SKL_MIN_SRC_W || src_h < SKL_MIN_SRC_H || src_w 5475 drivers/gpu/drm/i915/display/intel_display.c (src_w > ICL_MAX_SRC_W || src_h > ICL_MAX_SRC_H || src_w 5478 drivers/gpu/drm/i915/display/intel_display.c (src_w > SKL_MAX_SRC_W || src_h > SKL_MAX_SRC_H || src_w 5482 drivers/gpu/drm/i915/display/intel_display.c intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h); src_w 5490 drivers/gpu/drm/i915/display/intel_display.c intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h, src_w 11493 drivers/gpu/drm/i915/display/intel_display.c int src_w = drm_rect_width(&state->base.src) >> 16; src_w 11498 drivers/gpu/drm/i915/display/intel_display.c return (src_w != dst_w || src_h != dst_h); src_w 14691 drivers/gpu/drm/i915/display/intel_display.c u32 src_w, u32 src_h, src_w 14726 drivers/gpu/drm/i915/display/intel_display.c old_plane_state->src_w != src_w || src_w 14747 drivers/gpu/drm/i915/display/intel_display.c new_plane_state->src_w = src_w; src_w 14810 drivers/gpu/drm/i915/display/intel_display.c src_x, src_y, src_w, src_h, ctx); src_w 80 drivers/gpu/drm/i915/display/intel_fbc.c *width = cache->plane.src_w; src_w 679 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.src_w = drm_rect_width(&plane_state->base.src) >> 16; src_w 852 drivers/gpu/drm/i915/display/intel_fbc.c params->gen9_wa_cfb_stride = DIV_ROUND_UP(cache->plane.src_w, src_w 289 drivers/gpu/drm/i915/display/intel_sprite.c u32 src_x, src_y, src_w, src_h, hsub, vsub; src_w 299 drivers/gpu/drm/i915/display/intel_sprite.c src_w = drm_rect_width(src) >> 16; src_w 304 drivers/gpu/drm/i915/display/intel_sprite.c src->x2 = (src_x + src_w) << 16; src_w 319 drivers/gpu/drm/i915/display/intel_sprite.c if (src_x % hsub || src_w % hsub) { src_w 321 drivers/gpu/drm/i915/display/intel_sprite.c src_x, src_w, hsub, rotated ? "rotated " : ""); src_w 555 drivers/gpu/drm/i915/display/intel_sprite.c u32 src_w = drm_rect_width(&plane_state->base.src) >> 16; src_w 571 drivers/gpu/drm/i915/display/intel_sprite.c src_w--; src_w 590 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); src_w 1163 drivers/gpu/drm/i915/display/intel_sprite.c u32 src_w = drm_rect_width(&plane_state->base.src) >> 16; src_w 1171 drivers/gpu/drm/i915/display/intel_sprite.c src_w--; src_w 1176 drivers/gpu/drm/i915/display/intel_sprite.c if (crtc_w != src_w || crtc_h != src_h) src_w 1177 drivers/gpu/drm/i915/display/intel_sprite.c sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h; src_w 1416 drivers/gpu/drm/i915/display/intel_sprite.c u32 src_w = drm_rect_width(&plane_state->base.src) >> 16; src_w 1424 drivers/gpu/drm/i915/display/intel_sprite.c src_w--; src_w 1429 drivers/gpu/drm/i915/display/intel_sprite.c if (crtc_w != src_w || crtc_h != src_h) src_w 1430 drivers/gpu/drm/i915/display/intel_sprite.c dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h; src_w 1528 drivers/gpu/drm/i915/display/intel_sprite.c int src_x, src_w, src_h, crtc_w, crtc_h; src_w 1540 drivers/gpu/drm/i915/display/intel_sprite.c src_w = drm_rect_width(src) >> 16; src_w 1543 drivers/gpu/drm/i915/display/intel_sprite.c if (src_w == crtc_w && src_h == crtc_h) src_w 1558 drivers/gpu/drm/i915/display/intel_sprite.c width_bytes = ((src_x * cpp) & 63) + src_w * cpp; src_w 1560 drivers/gpu/drm/i915/display/intel_sprite.c if (src_w < min_width || src_h < min_height || src_w 1561 drivers/gpu/drm/i915/display/intel_sprite.c src_w > 2048 || src_h > 2048) { src_w 1563 drivers/gpu/drm/i915/display/intel_sprite.c src_w, src_h, min_width, min_height, 2048, 2048); src_w 1791 drivers/gpu/drm/i915/display/intel_sprite.c int src_w = drm_rect_width(&plane_state->base.src) >> 16; src_w 1794 drivers/gpu/drm/i915/display/intel_sprite.c if (is_planar_yuv_format(fb->format->format) && src_w & 3 && src_w 2680 drivers/gpu/drm/i915/i915_debugfs.c (state->src_w >> 16), src_w 2681 drivers/gpu/drm/i915/i915_debugfs.c ((state->src_w & 0xffff) * 15625) >> 10, src_w 388 drivers/gpu/drm/i915/i915_drv.h int src_w; src_w 4075 drivers/gpu/drm/i915/intel_pm.c u32 src_w, src_h, dst_w, dst_h; src_w 4088 drivers/gpu/drm/i915/intel_pm.c src_w = plane_state->base.src_w >> 16; src_w 4098 drivers/gpu/drm/i915/intel_pm.c src_w = drm_rect_width(&plane_state->base.src) >> 16; src_w 4104 drivers/gpu/drm/i915/intel_pm.c fp_w_ratio = div_fixed16(src_w, dst_w); src_w 4121 drivers/gpu/drm/i915/intel_pm.c u32 src_w, src_h, dst_w, dst_h; src_w 4126 drivers/gpu/drm/i915/intel_pm.c src_w = crtc_state->pipe_src_w; src_w 4134 drivers/gpu/drm/i915/intel_pm.c fp_w_ratio = div_fixed16(src_w, dst_w); src_w 41 drivers/gpu/drm/imx/ipuv3-plane.h uint32_t src_x, uint32_t src_y, uint32_t src_w, src_w 170 drivers/gpu/drm/meson/meson_overlay.c w_in = fixed16_to_int(state->src_w); src_w 115 drivers/gpu/drm/meson/meson_plane.c int src_w, src_h, dst_w, dst_h; src_w 199 drivers/gpu/drm/meson/meson_plane.c src_w = fixed16_to_int(state->src_w); src_w 217 drivers/gpu/drm/meson/meson_plane.c hf_phase_step = ((src_w << 18) / dst_w) << 6; src_w 228 drivers/gpu/drm/meson/meson_plane.c if (src_h != dst_h || src_w != dst_w) { src_w 229 drivers/gpu/drm/meson/meson_plane.c priv->viu.osd_sc_i_wh_m1 = SCI_WH_M1_W(src_w - 1) | src_w 267 drivers/gpu/drm/meson/meson_plane.c if (src_w != dst_w) { src_w 1157 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c state->src_x, state->src_y, state->src_w, state->src_h); src_w 442 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h, src_w 453 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c mult_frac((1 << PHASE_STEP_SHIFT), src_w, dst_w); src_w 474 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c scale_cfg->src_width[i] = src_w; src_w 488 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c && (src_w == dst_w)) src_w 674 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c src[i].x2 = src[i].x1 + (drm_state[i]->src_w >> 16); src_w 869 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c src.x2 = src.x1 + (state->src_w >> 16); src_w 1273 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->state->src_w >> 16, src_w 51 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c uint32_t src_w, uint32_t src_h); src_w 125 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c state->src_w, state->src_h); src_w 197 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c uint32_t src_w, uint32_t src_h) src_w 219 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c src_w = src_w >> 16; src_w 223 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c fb->base.id, src_x, src_y, src_w, src_h, src_w 228 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c if (src_w > (crtc_w * DOWN_SCALE_MAX)) { src_w 238 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c if (crtc_w > (src_w * UP_SCALE_MAX)) { src_w 248 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c if (src_w != crtc_w) { src_w 253 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c if (crtc_w > src_w) src_w 255 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c else if (crtc_w <= (src_w / 4)) src_w 260 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c src_w, crtc_w); src_w 282 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c MDP4_PIPE_SRC_SIZE_WIDTH(src_w) | src_w 332 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) | src_w 278 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (state->src_w > max_width) { src_w 285 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c (state->src_w <= 2 * max_width)) src_w 317 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (((state->src_w >> 16) != state->crtc_w) || src_w 353 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c state->src_w >> 16, false); src_w 464 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state->src_w != state->src_w || src_w 746 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c uint32_t src_w, int pe_left[COMP_MAX], int pe_right[COMP_MAX], src_w 754 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c uint32_t roi_w = src_w; src_w 827 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c u32 src_w, u32 src_h) src_w 839 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c MDP5_PIPE_SRC_SIZE_WIDTH(src_w) | src_w 883 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_w, pe->left, pe->right, src_w 933 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c uint32_t src_w, src_h; src_w 948 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_w = drm_rect_width(src); src_w 959 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_w = src_w >> 16; src_w 962 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_img_w = min(fb->width, src_w); src_w 966 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c fb->base.id, src_x, src_y, src_w, src_h, src_w 977 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_w /= 2; src_w 981 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ret = calc_scalex_steps(plane, pix_format, src_w, crtc_w, step.x); src_w 990 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c calc_pixel_ext(format, src_w, crtc_w, step.x, src_w 999 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c config |= get_scale_config(format, src_w, crtc_w, true); src_w 1014 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_x, src_y, src_w, src_h); src_w 1020 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_x + src_w, src_y, src_w, src_h); src_w 93 drivers/gpu/drm/nouveau/dispnv04/overlay.c uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, src_w 96 drivers/gpu/drm/nouveau/dispnv04/overlay.c if (crtc_w < (src_w >> shift) || crtc_h < (src_h >> shift)) { src_w 98 drivers/gpu/drm/nouveau/dispnv04/overlay.c src_w, src_h, crtc_w, crtc_h); src_w 116 drivers/gpu/drm/nouveau/dispnv04/overlay.c uint32_t src_w, uint32_t src_h, src_w 136 drivers/gpu/drm/nouveau/dispnv04/overlay.c src_w >>= 16; src_w 139 drivers/gpu/drm/nouveau/dispnv04/overlay.c ret = verify_scaling(fb, shift, 0, 0, src_w, src_h, crtc_w, crtc_h); src_w 154 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); src_w 156 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_DS_DX(flip), (src_w << 20) / crtc_w); src_w 365 drivers/gpu/drm/nouveau/dispnv04/overlay.c uint32_t src_w, uint32_t src_h, src_w 380 drivers/gpu/drm/nouveau/dispnv04/overlay.c src_w >>= 16; src_w 383 drivers/gpu/drm/nouveau/dispnv04/overlay.c ret = verify_scaling(fb, 0, src_x, src_y, src_w, src_h, crtc_w, crtc_h); src_w 407 drivers/gpu/drm/nouveau/dispnv04/overlay.c (uint32_t)(((src_h - 1) << 11) / (crtc_h - 1)) << 16 | (uint32_t)(((src_w - 1) << 11) / (crtc_w - 1))); src_w 281 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->scale.sw = asyw->state.src_w >> 16; src_w 143 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c (asyw->state.src_w >> 16)); src_w 56 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c (asyw->state.src_w >> 16)); src_w 147 drivers/gpu/drm/omapdrm/omap_fb.c info->width = state->src_w >> 16; src_w 158 drivers/gpu/drm/omapdrm/omap_fb.c u32 w = state->src_w >> 16; src_w 311 drivers/gpu/drm/rockchip/rockchip_drm_vop.c uint32_t src_w, uint32_t src_h, uint32_t dst_w, src_w 318 drivers/gpu/drm/rockchip/rockchip_drm_vop.c uint16_t cbcr_src_w = src_w / info->hsub; src_w 335 drivers/gpu/drm/rockchip/rockchip_drm_vop.c scl_cal_scale2(src_w, dst_w)); src_w 347 drivers/gpu/drm/rockchip/rockchip_drm_vop.c yrgb_hor_scl_mode = scl_get_scl_mode(src_w, dst_w); src_w 361 drivers/gpu/drm/rockchip/rockchip_drm_vop.c lb_mode = scl_vop_cal_lb_mode(src_w, false); src_w 381 drivers/gpu/drm/rockchip/rockchip_drm_vop.c val = scl_vop_cal_scale(yrgb_hor_scl_mode, src_w, dst_w, src_w 961 drivers/gpu/drm/rockchip/rockchip_drm_vop.c plane->state->src_w = new_state->src_w; src_w 16 drivers/gpu/drm/selftests/test-drm_plane_helper.c unsigned src_w, unsigned src_h) src_w 20 drivers/gpu/drm/selftests/test-drm_plane_helper.c plane_state->src_w = src_w; src_w 26 drivers/gpu/drm/selftests/test-drm_plane_helper.c unsigned src_w, unsigned src_h) src_w 41 drivers/gpu/drm/selftests/test-drm_plane_helper.c drm_rect_width(&plane_state->src) != src_w || src_w 174 drivers/gpu/drm/shmobile/shmob_drm_plane.c uint32_t src_w, uint32_t src_h, src_w 188 drivers/gpu/drm/shmobile/shmob_drm_plane.c if (src_w >> 16 != crtc_w || src_h >> 16 != crtc_h) { src_w 193 drivers/gpu/drm/sti/sti_cursor.c int src_w, src_h; src_w 206 drivers/gpu/drm/sti/sti_cursor.c src_w = state->src_w >> 16; src_w 209 drivers/gpu/drm/sti/sti_cursor.c if (src_w < STI_CURS_MIN_SIZE || src_w 211 drivers/gpu/drm/sti/sti_cursor.c src_w > STI_CURS_MAX_SIZE || src_w 214 drivers/gpu/drm/sti/sti_cursor.c src_w, src_h); src_w 220 drivers/gpu/drm/sti/sti_cursor.c (cursor->width != src_w) || src_w 222 drivers/gpu/drm/sti/sti_cursor.c cursor->width = src_w; src_w 627 drivers/gpu/drm/sti/sti_gdp.c int src_x, src_y, src_w, src_h; src_w 644 drivers/gpu/drm/sti/sti_gdp.c src_w = clamp_val(state->src_w >> 16, 0, GAM_GDP_SIZE_MAX_WIDTH); src_w 691 drivers/gpu/drm/sti/sti_gdp.c src_w, src_h, src_x, src_y); src_w 706 drivers/gpu/drm/sti/sti_gdp.c int src_x, src_y, src_w, src_h; src_w 727 drivers/gpu/drm/sti/sti_gdp.c (oldstate->src_w == state->src_w) && src_w 753 drivers/gpu/drm/sti/sti_gdp.c src_w = clamp_val(state->src_w >> 16, 0, GAM_GDP_SIZE_MAX_WIDTH); src_w 784 drivers/gpu/drm/sti/sti_gdp.c dst_w = sti_gdp_get_dst(gdp->dev, dst_w, src_w); src_w 794 drivers/gpu/drm/sti/sti_gdp.c src_w = dst_w; src_w 796 drivers/gpu/drm/sti/sti_gdp.c top_field->gam_gdp_size = src_h << 16 | src_w; src_w 480 drivers/gpu/drm/sti/sti_hqvdp.c int src_w, src_h, dst_w, dst_h; src_w 512 drivers/gpu/drm/sti/sti_hqvdp.c src_w = c->top.input_viewport_size & 0x0000FFFF; src_w 514 drivers/gpu/drm/sti/sti_hqvdp.c seq_printf(s, "\t%dx%d", src_w, src_h); src_w 534 drivers/gpu/drm/sti/sti_hqvdp.c if (dst_w > src_w) src_w 535 drivers/gpu/drm/sti/sti_hqvdp.c seq_printf(s, " %d/1", dst_w / src_w); src_w 537 drivers/gpu/drm/sti/sti_hqvdp.c seq_printf(s, " 1/%d", src_w / dst_w); src_w 734 drivers/gpu/drm/sti/sti_hqvdp.c int src_w, int src_h, src_w 741 drivers/gpu/drm/sti/sti_hqvdp.c lfw /= max(src_w, dst_w) * mode->clock / 1000; src_w 1029 drivers/gpu/drm/sti/sti_hqvdp.c int src_x, src_y, src_w, src_h; src_w 1044 drivers/gpu/drm/sti/sti_hqvdp.c src_w = state->src_w >> 16; src_w 1048 drivers/gpu/drm/sti/sti_hqvdp.c src_w, src_h, src_w 1066 drivers/gpu/drm/sti/sti_hqvdp.c if ((src_w > MAX_WIDTH) || (src_w < MIN_WIDTH) || src_w 1071 drivers/gpu/drm/sti/sti_hqvdp.c src_w, src_h, src_w 1104 drivers/gpu/drm/sti/sti_hqvdp.c src_w, src_h, src_x, src_y); src_w 1119 drivers/gpu/drm/sti/sti_hqvdp.c int src_x, src_y, src_w, src_h; src_w 1135 drivers/gpu/drm/sti/sti_hqvdp.c (oldstate->src_w == state->src_w) && src_w 1151 drivers/gpu/drm/sti/sti_hqvdp.c src_w = state->src_w >> 16; src_w 1195 drivers/gpu/drm/sti/sti_hqvdp.c cmd->top.input_viewport_size = src_h << 16 | src_w; src_w 1196 drivers/gpu/drm/sti/sti_hqvdp.c cmd->top.input_frame_size = src_h << 16 | src_w; src_w 1206 drivers/gpu/drm/sti/sti_hqvdp.c cmd->top.input_frame_size = (src_h / 2) << 16 | src_w; src_w 1219 drivers/gpu/drm/sti/sti_hqvdp.c scale_h = SCALE_FACTOR * dst_w / src_w; src_w 738 drivers/gpu/drm/stm/ltdc.c u32 src_w, src_h; src_w 746 drivers/gpu/drm/stm/ltdc.c src_w = state->src_w >> 16; src_w 750 drivers/gpu/drm/stm/ltdc.c if (src_w != state->crtc_w || src_h != state->crtc_h) { src_w 769 drivers/gpu/drm/stm/ltdc.c u32 src_x, src_y, src_w, src_h; src_w 781 drivers/gpu/drm/stm/ltdc.c src_w = state->src_w >> 16; src_w 786 drivers/gpu/drm/stm/ltdc.c src_w, src_h, src_x, src_y, src_w 413 drivers/gpu/drm/sun4i/sun4i_backend.c u16 src_w = state->src_w >> 16; src_w 416 drivers/gpu/drm/sun4i/sun4i_backend.c src_w, src_h, state->crtc_w, state->crtc_h); src_w 418 drivers/gpu/drm/sun4i/sun4i_backend.c if ((state->crtc_h != src_h) || (state->crtc_w != src_w)) src_w 167 drivers/gpu/drm/sun4i/sun4i_frontend.c unsigned int width = state->src_w >> 16; src_w 506 drivers/gpu/drm/sun4i/sun4i_frontend.c luma_width = state->src_w >> 16; src_w 80 drivers/gpu/drm/sun4i/sun8i_ui_layer.c u32 src_w, src_h, dst_w, dst_h; src_w 91 drivers/gpu/drm/sun4i/sun8i_ui_layer.c src_w = drm_rect_width(&state->src) >> 16; src_w 99 drivers/gpu/drm/sun4i/sun8i_ui_layer.c insize = SUN8I_MIXER_SIZE(src_w, src_h); src_w 135 drivers/gpu/drm/sun4i/sun8i_ui_layer.c DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); src_w 148 drivers/gpu/drm/sun4i/sun8i_ui_layer.c hscale = state->src_w / state->crtc_w; src_w 151 drivers/gpu/drm/sun4i/sun8i_ui_layer.c sun8i_ui_scaler_setup(mixer, channel, src_w, src_h, dst_w, src_w 149 drivers/gpu/drm/sun4i/sun8i_ui_scaler.c u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, src_w 166 drivers/gpu/drm/sun4i/sun8i_ui_scaler.c insize = SUN8I_UI_SCALER_SIZE(src_w, src_h); src_w 40 drivers/gpu/drm/sun4i/sun8i_ui_scaler.h u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, src_w 74 drivers/gpu/drm/sun4i/sun8i_vi_layer.c u32 src_w, src_h, dst_w, dst_h; src_w 88 drivers/gpu/drm/sun4i/sun8i_vi_layer.c src_w = drm_rect_width(&state->src) >> 16; src_w 102 drivers/gpu/drm/sun4i/sun8i_vi_layer.c src_w = (src_w + remainder) & ~mask; src_w 115 drivers/gpu/drm/sun4i/sun8i_vi_layer.c insize = SUN8I_MIXER_SIZE(src_w, src_h); src_w 122 drivers/gpu/drm/sun4i/sun8i_vi_layer.c DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); src_w 149 drivers/gpu/drm/sun4i/sun8i_vi_layer.c do_div(ability, mode->vdisplay * fps * max(src_w, dst_w)); src_w 163 drivers/gpu/drm/sun4i/sun8i_vi_layer.c if (src_w > scanline) { src_w 165 drivers/gpu/drm/sun4i/sun8i_vi_layer.c hm = src_w; src_w 167 drivers/gpu/drm/sun4i/sun8i_vi_layer.c src_w = hn; src_w 170 drivers/gpu/drm/sun4i/sun8i_vi_layer.c hscale = (src_w << 16) / dst_w; src_w 173 drivers/gpu/drm/sun4i/sun8i_vi_layer.c sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w, src_w 927 drivers/gpu/drm/sun4i/sun8i_vi_scaler.c u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, src_w 942 drivers/gpu/drm/sun4i/sun8i_vi_scaler.c insize = SUN8I_VI_SCALER_SIZE(src_w, src_h); src_w 985 drivers/gpu/drm/sun4i/sun8i_vi_scaler.c SUN8I_VI_SCALER_SIZE(src_w / format->hsub, src_w 74 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, src_w 818 drivers/gpu/drm/tegra/dc.c if ((state->src_w >> 16 != state->crtc_w) || src_w 823 drivers/gpu/drm/tegra/dc.c if (state->src_w != state->src_h) src_w 376 drivers/gpu/drm/vc4/vc4_drv.h u32 src_w[2], src_h[2]; src_w 344 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->src_w[0] = (state->src.x2 - state->src.x1) >> 16; src_w 356 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->x_scaling[0] = vc4_get_scaling_mode(vc4_state->src_w[0], src_w 367 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->src_w[1] = vc4_state->src_w[0] / h_subsample; src_w 371 drivers/gpu/drm/vc4/vc4_plane.c vc4_get_scaling_mode(vc4_state->src_w[1], src_w 428 drivers/gpu/drm/vc4/vc4_plane.c u32 pix_per_line = max(vc4_state->src_w[0], (u32)vc4_state->crtc_w); src_w 464 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->src_w[channel], vc4_state->crtc_w); src_w 477 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->src_w[channel], vc4_state->crtc_w); src_w 532 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->membus_load += vc4_state->src_w[i] * src_w 824 drivers/gpu/drm/vc4/vc4_plane.c VC4_SET_FIELD(vc4_state->src_w[0], SCALER_POS2_WIDTH) | src_w 1030 drivers/gpu/drm/vc4/vc4_plane.c plane->state->src_w = state->src_w; src_w 1053 drivers/gpu/drm/vc4/vc4_plane.c memcpy(vc4_state->src_w, new_vc4_state->src_w, src_w 1054 drivers/gpu/drm/vc4/vc4_plane.c sizeof(vc4_state->src_w)); src_w 114 drivers/gpu/drm/virtio/virtgpu_plane.c cpu_to_le32(plane->state->src_w >> 16), src_w 126 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_w >> 16, src_w 131 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_w >> 16, src_w 139 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_w >> 16, src_w 148 drivers/gpu/drm/zte/zx_plane.c u32 src_w, u32 src_h, u32 dst_w, u32 dst_h) src_w 151 drivers/gpu/drm/zte/zx_plane.c u32 src_chroma_w = src_w; src_w 156 drivers/gpu/drm/zte/zx_plane.c zx_writel(rsz + RSZ_SRC_CFG, RSZ_VER(src_h - 1) | RSZ_HOR(src_w - 1)); src_w 166 drivers/gpu/drm/zte/zx_plane.c src_chroma_w = src_w >> 1; src_w 169 drivers/gpu/drm/zte/zx_plane.c src_chroma_w = src_w >> 1; src_w 173 drivers/gpu/drm/zte/zx_plane.c zx_writel(rsz + RSZ_VL_LUMA_HOR, rsz_step_value(src_w, dst_w)); src_w 194 drivers/gpu/drm/zte/zx_plane.c u32 src_x, src_y, src_w, src_h; src_w 207 drivers/gpu/drm/zte/zx_plane.c src_w = drm_rect_width(src) >> 16; src_w 227 drivers/gpu/drm/zte/zx_plane.c zx_writel(layer + VL_SRC_SIZE, GL_SRC_W(src_w) | GL_SRC_H(src_h)); src_w 249 drivers/gpu/drm/zte/zx_plane.c zx_vl_rsz_setup(zplane, format, src_w, src_h, dst_w, dst_h); src_w 338 drivers/gpu/drm/zte/zx_plane.c static void zx_gl_rsz_setup(struct zx_plane *zplane, u32 src_w, u32 src_h, src_w 343 drivers/gpu/drm/zte/zx_plane.c zx_writel(rsz + RSZ_SRC_CFG, RSZ_VER(src_h - 1) | RSZ_HOR(src_w - 1)); src_w 358 drivers/gpu/drm/zte/zx_plane.c u32 src_x, src_y, src_w, src_h; src_w 374 drivers/gpu/drm/zte/zx_plane.c src_w = plane->state->src_w >> 16; src_w 390 drivers/gpu/drm/zte/zx_plane.c zx_writel(layer + GL_SRC_SIZE, GL_SRC_W(src_w) | GL_SRC_H(src_h)); src_w 425 drivers/gpu/drm/zte/zx_plane.c zx_gl_rsz_setup(zplane, src_w, src_h, dst_w, dst_h); src_w 400 drivers/media/pci/ivtv/ivtv-driver.h u32 src_w; src_w 903 drivers/media/pci/ivtv/ivtv-irq.c if (f->src_w) { src_w 229 drivers/media/pci/ivtv/ivtv-yuv.c f->tru_w, f->src_w, f->dst_w, f->src_x, f->dst_x); src_w 232 drivers/media/pci/ivtv/ivtv-yuv.c x_cutoff = f->src_w + f->src_x; src_w 256 drivers/media/pci/ivtv/ivtv-yuv.c if (f->dst_w >= f->src_w) src_w 262 drivers/media/pci/ivtv/ivtv-yuv.c if (f->dst_w < f->src_w) src_w 268 drivers/media/pci/ivtv/ivtv-yuv.c reg_2870_offset = (f->src_x * ((f->dst_w << 21) / f->src_w)) >> 19; src_w 270 drivers/media/pci/ivtv/ivtv-yuv.c if (f->dst_w >= f->src_w) { src_w 272 drivers/media/pci/ivtv/ivtv-yuv.c master_width = (f->src_w * 0x00200000) / (f->dst_w); src_w 273 drivers/media/pci/ivtv/ivtv-yuv.c if (master_width * f->dst_w != f->src_w * 0x00200000) src_w 285 drivers/media/pci/ivtv/ivtv-yuv.c if (f->dst_w > f->src_w) src_w 286 drivers/media/pci/ivtv/ivtv-yuv.c reg_2870_base = ((f->dst_w - f->src_w)<<16) / (f->src_w <<14); src_w 292 drivers/media/pci/ivtv/ivtv-yuv.c } else if (f->dst_w < f->src_w / 2) { src_w 293 drivers/media/pci/ivtv/ivtv-yuv.c master_width = (f->src_w * 0x00080000) / f->dst_w; src_w 294 drivers/media/pci/ivtv/ivtv-yuv.c if (master_width * f->dst_w != f->src_w * 0x00080000) src_w 304 drivers/media/pci/ivtv/ivtv-yuv.c reg_2870 += (5 - (((f->src_w + f->src_w / 2) - 1) / f->dst_w)) << 16; src_w 307 drivers/media/pci/ivtv/ivtv-yuv.c master_width = (f->src_w * 0x00100000) / f->dst_w; src_w 308 drivers/media/pci/ivtv/ivtv-yuv.c if (master_width * f->dst_w != f->src_w * 0x00100000) src_w 318 drivers/media/pci/ivtv/ivtv-yuv.c reg_2870 += (5 - (((f->src_w * 3) - 1) / f->dst_w)) << 16; src_w 323 drivers/media/pci/ivtv/ivtv-yuv.c if (f->src_w == f->dst_w) { src_w 328 drivers/media/pci/ivtv/ivtv-yuv.c h_filter = ((f->src_w << 16) / f->dst_w) >> 15; src_w 671 drivers/media/pci/ivtv/ivtv-yuv.c if ((osd_crop = f->src_w - 4 * f->dst_w) > 0) { src_w 673 drivers/media/pci/ivtv/ivtv-yuv.c f->src_w = (f->src_w - osd_crop) & ~3; src_w 674 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_w = f->src_w / 4; src_w 695 drivers/media/pci/ivtv/ivtv-yuv.c (int)f->src_w <= 2 || (int)f->src_h <= 2) { src_w 718 drivers/media/pci/ivtv/ivtv-yuv.c osd_scale = (f->src_w << 16) / f->dst_w; src_w 723 drivers/media/pci/ivtv/ivtv-yuv.c f->src_w -= (osd_scale * osd_crop) >> 16; src_w 733 drivers/media/pci/ivtv/ivtv-yuv.c f->src_w -= (osd_scale * osd_crop) >> 16; src_w 747 drivers/media/pci/ivtv/ivtv-yuv.c f->src_w += f->src_x & 1; src_w 750 drivers/media/pci/ivtv/ivtv-yuv.c f->src_w &= ~1; src_w 765 drivers/media/pci/ivtv/ivtv-yuv.c if (f->dst_w < f->src_w / 4) { src_w 766 drivers/media/pci/ivtv/ivtv-yuv.c f->src_w &= ~3; src_w 767 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_w = f->src_w / 4; src_w 778 drivers/media/pci/ivtv/ivtv-yuv.c (int)f->src_w <= 2 || (int)f->src_h <= 2) { src_w 783 drivers/media/pci/ivtv/ivtv-yuv.c if ((of->dst_w != f->dst_w) || (of->src_w != f->src_w) || src_w 980 drivers/media/pci/ivtv/ivtv-yuv.c nf->src_w = args->src.width; src_w 1276 drivers/media/pci/ivtv/ivtv-yuv.c yi->old_frame_info.src_w = 0; src_w 1278 drivers/media/pci/ivtv/ivtv-yuv.c yi->old_frame_info_args.src_w = 0; src_w 846 drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c static int mtk_mdp_check_scaler_ratio(struct mtk_mdp_variant *var, int src_w, src_w 859 drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c if ((src_w / tmp_w) > var->h_scale_down_max || src_w 861 drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c (tmp_w / src_w) > var->h_scale_up_max || src_w 166 drivers/media/platform/rockchip/rga/rga-hw.c unsigned int src_h, src_w, src_x, src_y, dst_h, dst_w, dst_x, dst_y; src_w 181 drivers/media/platform/rockchip/rga/rga-hw.c src_w = ctx->in.crop.width; src_w 261 drivers/media/platform/rockchip/rga/rga-hw.c if (abs(src_w - dst_h) < 16) src_w 262 drivers/media/platform/rockchip/rga/rga-hw.c src_w -= 16; src_w 272 drivers/media/platform/rockchip/rga/rga-hw.c if (src_w == scale_dst_w) { src_w 275 drivers/media/platform/rockchip/rga/rga-hw.c } else if (src_w > scale_dst_w) { src_w 278 drivers/media/platform/rockchip/rga/rga-hw.c rga_get_scaling(src_w, scale_dst_w) + 1; src_w 282 drivers/media/platform/rockchip/rga/rga-hw.c rga_get_scaling(src_w - 1, scale_dst_w - 1); src_w 306 drivers/media/platform/rockchip/rga/rga-hw.c src_act_info.data.act_width = src_w - 1; src_w 316 drivers/media/platform/rockchip/rga/rga-hw.c src_w, src_h); src_w 630 drivers/media/platform/sti/bdisp/bdisp-hw.c u32 src_w, src_h, dst_w, dst_h; src_w 632 drivers/media/platform/sti/bdisp/bdisp-hw.c src_w = ctx->src.crop.width; src_w 637 drivers/media/platform/sti/bdisp/bdisp-hw.c if (bdisp_hw_get_inc(src_w, dst_w, h_inc) || src_w 641 drivers/media/platform/sti/bdisp/bdisp-hw.c src_w, src_h, dst_w, dst_h); src_w 61 drivers/media/platform/ti-vpe/sc.c void sc_set_hs_coeffs(struct sc_data *sc, void *addr, unsigned int src_w, src_w 70 drivers/media/platform/ti-vpe/sc.c if (dst_w > src_w) { src_w 73 drivers/media/platform/ti-vpe/sc.c if ((dst_w << 1) < src_w) src_w 75 drivers/media/platform/ti-vpe/sc.c if ((dst_w << 1) < src_w) src_w 78 drivers/media/platform/ti-vpe/sc.c if (dst_w == src_w) { src_w 81 drivers/media/platform/ti-vpe/sc.c sixteenths = (dst_w << 4) / src_w; src_w 148 drivers/media/platform/ti-vpe/sc.c u32 *sc_reg17, unsigned int src_w, unsigned int src_h, src_w 178 drivers/media/platform/ti-vpe/sc.c if (src_w == dst_w && src_h == dst_h) { src_w 190 drivers/media/platform/ti-vpe/sc.c dcm_x = src_w / dst_w; src_w 202 drivers/media/platform/ti-vpe/sc.c lin_acc_inc = div64_u64(((u64)(src_w >> dcm_shift) - 1) << 24, lltmp); src_w 207 drivers/media/platform/ti-vpe/sc.c src_w, dst_w, dcm_shift == 2 ? "4x" : src_w 260 drivers/media/platform/ti-vpe/sc.c sc_reg0[5] = (src_w << CFG_SRC_W_SHIFT) | (src_h << CFG_SRC_H_SHIFT); src_w 271 drivers/media/platform/ti-vpe/sc.c *sc_reg24 = (src_w << CFG_ORG_W_SHIFT) | (src_h << CFG_ORG_H_SHIFT); src_w 199 drivers/media/platform/ti-vpe/sc.h void sc_set_hs_coeffs(struct sc_data *sc, void *addr, unsigned int src_w, src_w 204 drivers/media/platform/ti-vpe/sc.h u32 *sc_reg17, unsigned int src_w, unsigned int src_h, src_w 782 drivers/media/platform/ti-vpe/vpe.c unsigned int src_w = s_q_data->c_rect.width; src_w 801 drivers/media/platform/ti-vpe/vpe.c (src_w << VPE_DEI_WIDTH_SHIFT) | src_w 851 drivers/media/platform/ti-vpe/vpe.c unsigned int src_w = s_q_data->c_rect.width; src_w 898 drivers/media/platform/ti-vpe/vpe.c sc_set_hs_coeffs(ctx->dev->sc, ctx->sc_coeff_h.addr, src_w, dst_w); src_w 903 drivers/media/platform/ti-vpe/vpe.c src_w, src_h, dst_w, dst_h); src_w 2079 drivers/media/platform/ti-vpe/vpe.c unsigned int src_w = s_q_data->c_rect.width; src_w 2084 drivers/media/platform/ti-vpe/vpe.c if (src_w == dst_w && src_h == dst_h) src_w 2088 drivers/media/platform/ti-vpe/vpe.c src_w <= SC_MAX_PIXEL_WIDTH && src_w 116 include/drm/drm_atomic_helper.h uint32_t src_w, uint32_t src_h, src_w 114 include/drm/drm_plane.h uint32_t src_h, src_w; src_w 216 include/drm/drm_plane.h .x2 = state->src_x + state->src_w, src_w 269 include/drm/drm_plane.h uint32_t src_w, uint32_t src_h, src_w 291 include/uapi/drm/drm_mode.h __u32 src_w; src_w 919 sound/soc/intel/skylake/skl-topology.c struct snd_soc_dapm_widget *src_w, src_w 939 sound/soc/intel/skylake/skl-topology.c return skl_tplg_bind_sinks(p->sink, skl, src_w, src_mconfig); src_w 984 sound/soc/intel/skylake/skl-topology.c skl_tplg_set_module_bind_params(src_w, src_w 1002 sound/soc/intel/skylake/skl-topology.c return skl_tplg_bind_sinks(next_sink, skl, src_w, src_mconfig); src_w 1045 sound/soc/intel/skylake/skl-topology.c struct snd_soc_dapm_widget *src_w = NULL; src_w 1048 sound/soc/intel/skylake/skl-topology.c src_w = p->source; src_w 1066 sound/soc/intel/skylake/skl-topology.c if (src_w != NULL) src_w 1067 sound/soc/intel/skylake/skl-topology.c return skl_get_src_dsp_widget(src_w, skl);