src_uv            209 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c 	u32 phase_init, preload, src_y_rgb, src_uv, dst;
src_uv            234 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c 	src_uv = (scaler3_cfg->src_width[1] & 0x1FFFF) |
src_uv            283 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c 	DPU_REG_WRITE(c, QSEED3_SRC_SIZE_UV + scaler_offset, src_uv);
src_uv            480 drivers/staging/media/allegro-dvt/allegro-core.c 	u32 src_uv;
src_uv           1127 drivers/staging/media/allegro-dvt/allegro-core.c 					 dma_addr_t src_y, dma_addr_t src_uv)
src_uv           1142 drivers/staging/media/allegro-dvt/allegro-core.c 	msg.src_uv = src_uv;
src_uv           2717 drivers/staging/media/allegro-dvt/allegro-core.c 	dma_addr_t src_uv;
src_uv           2730 drivers/staging/media/allegro-dvt/allegro-core.c 	src_uv = src_y + (channel->stride * channel->height);
src_uv           2731 drivers/staging/media/allegro-dvt/allegro-core.c 	allegro_mcu_send_encode_frame(dev, channel, src_y, src_uv);