src_h 692 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c u32 src_h = 1, dst_h = 1; src_h 718 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c src_h = crtc->mode.hdisplay; src_h 738 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c src_h = crtc->mode.hdisplay; src_h 747 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c a.full = dfixed_const(src_h); src_h 2628 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c scaling_info->src_rect.height = state->src_h >> 16; src_h 4637 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c plane->state->src_h = new_state->src_h; src_h 209 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c u32 src_x, u32 src_y, u32 src_w, u32 src_h) src_h 216 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c if ((src_x + src_w > fb->width) || (src_y + src_h > fb->height)) { src_h 222 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c (src_y % info->vsub) || (src_h % info->vsub)) { src_h 224 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c src_x, src_y, src_w, src_h, info->format); src_h 229 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c (src_y % block_h) || (src_h % block_h)) { src_h 231 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c src_x, src_y, src_w, src_h, info->format); src_h 42 drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h u32 src_x, u32 src_y, u32 src_w, u32 src_h); src_h 287 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c u32 src_x, src_y, src_w, src_h; src_h 296 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c src_h = dflow->out_h; src_h 301 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c src_h = dflow->in_h; src_h 304 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c if (komeda_fb_check_src_coords(kfb, src_x, src_y, src_w, src_h)) src_h 312 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c if (!in_range(&layer->vsize_in, src_h)) { src_h 313 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c DRM_DEBUG_ATOMIC("invalidate src_h %d.\n", src_h); src_h 48 drivers/gpu/drm/arm/display/komeda/komeda_plane.c dflow->in_h = st->src_h >> 16; src_h 237 drivers/gpu/drm/arm/hdlcd_crtc.c u32 src_h = state->src_h >> 16; src_h 240 drivers/gpu/drm/arm/hdlcd_crtc.c if (src_h >= HDLCD_MAX_YRES) { src_h 241 drivers/gpu/drm/arm/hdlcd_crtc.c DRM_DEBUG_KMS("Invalid source width: %d\n", src_h); src_h 285 drivers/gpu/drm/arm/malidp_crtc.c pstate->src_h); src_h 291 drivers/gpu/drm/arm/malidp_crtc.c s->input_w = pstate->src_h >> 16; src_h 295 drivers/gpu/drm/arm/malidp_crtc.c s->input_h = pstate->src_h >> 16; src_h 276 drivers/gpu/drm/arm/malidp_planes.c u32 src_w, src_h; src_h 290 drivers/gpu/drm/arm/malidp_planes.c src_w = state->src_h >> 16; src_h 291 drivers/gpu/drm/arm/malidp_planes.c src_h = state->src_w >> 16; src_h 294 drivers/gpu/drm/arm/malidp_planes.c src_h = state->src_h >> 16; src_h 297 drivers/gpu/drm/arm/malidp_planes.c if ((state->crtc_w == src_w) && (state->crtc_h == src_h)) { src_h 752 drivers/gpu/drm/arm/malidp_planes.c u32 src_w, src_h, val = 0, src_x, src_y; src_h 768 drivers/gpu/drm/arm/malidp_planes.c src_h = plane->state->src_h >> 16; src_h 777 drivers/gpu/drm/arm/malidp_planes.c val = ((fb->height - (src_y + src_h)) << MALIDP_AD_CROP_BOTTOM_OFFSET) | src_h 799 drivers/gpu/drm/arm/malidp_planes.c u32 src_w, src_h, dest_w, dest_h, val; src_h 811 drivers/gpu/drm/arm/malidp_planes.c src_h = fb->height; src_h 815 drivers/gpu/drm/arm/malidp_planes.c src_h = state->src_h >> 16; src_h 838 drivers/gpu/drm/arm/malidp_planes.c malidp_hw_write(mp->hwdev, LAYER_H_VAL(src_w) | LAYER_V_VAL(src_h), src_h 856 drivers/gpu/drm/arm/malidp_planes.c LAYER_H_VAL(src_w) | LAYER_V_VAL(src_h), src_h 254 drivers/gpu/drm/armada/armada_overlay.c uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, src_h 263 drivers/gpu/drm/armada/armada_overlay.c src_x, src_y, src_w, src_h); src_h 287 drivers/gpu/drm/armada/armada_overlay.c plane_state->src_h = src_h; src_h 34 drivers/gpu/drm/armada/armada_trace.h uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h), src_h 35 drivers/gpu/drm/armada/armada_trace.h TP_ARGS(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, src_x, src_y, src_w, src_h), src_h 47 drivers/gpu/drm/armada/armada_trace.h __field(u32, src_h) src_h 60 drivers/gpu/drm/armada/armada_trace.h __entry->src_h = src_h; src_h 67 drivers/gpu/drm/armada/armada_trace.h __entry->src_w >> 16, __entry->src_h >> 16) src_h 53 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c uint32_t src_h; src_h 292 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if (state->crtc_w == state->src_w && state->crtc_h == state->src_h) { src_h 303 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c yfactor = atmel_hlcdc_plane_phiscaler_get_factor(state->src_h, src_h 315 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->crtc_h < state->src_h ? src_h 322 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c yfactor = (1024 * state->src_h) / state->crtc_h; src_h 346 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->src_h)); src_h 499 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c pixels = (plane_state->src_w * plane_state->src_h) - src_h 623 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->src_h = drm_rect_height(&s->src); src_h 629 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if ((state->src_x | state->src_y | state->src_w | state->src_h) & src_h 636 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->src_h >>= 16; src_h 657 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->xstride[i] = -(((state->src_h - 1) / ydiv) * src_h 663 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c offset = ((state->src_y + state->src_h - 1) / src_h 672 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c offset = ((state->src_y + state->src_h - 1) / src_h 675 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->xstride[i] = ((state->src_h - 1) / ydiv) * src_h 698 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->src_w = state->src_h; src_h 699 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c state->src_h = tmp; src_h 707 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c if ((state->crtc_h != state->src_h || state->crtc_w != state->src_w) && src_h 603 drivers/gpu/drm/drm_atomic.c new_plane_state->src_h > fb_height || src_h 604 drivers/gpu/drm/drm_atomic.c new_plane_state->src_y > fb_height - new_plane_state->src_h) { src_h 610 drivers/gpu/drm/drm_atomic.c new_plane_state->src_h >> 16, src_h 611 drivers/gpu/drm/drm_atomic.c ((new_plane_state->src_h & 0xffff) * 15625) >> 10, src_h 1276 drivers/gpu/drm/drm_atomic.c plane_state->src_h = 0; src_h 1411 drivers/gpu/drm/drm_atomic.c primary_state->src_h = hdisplay << 16; src_h 1414 drivers/gpu/drm/drm_atomic.c primary_state->src_h = vdisplay << 16; src_h 2834 drivers/gpu/drm/drm_atomic_helper.c uint32_t src_w, uint32_t src_h, src_h 2863 drivers/gpu/drm/drm_atomic_helper.c plane_state->src_h = src_h; src_h 560 drivers/gpu/drm/drm_atomic_uapi.c state->src_h = val; src_h 628 drivers/gpu/drm/drm_atomic_uapi.c *val = state->src_h; src_h 198 drivers/gpu/drm/drm_crtc_internal.h uint32_t src_w, uint32_t src_h, src_h 76 drivers/gpu/drm/drm_framebuffer.c uint32_t src_w, uint32_t src_h, src_h 87 drivers/gpu/drm/drm_framebuffer.c src_h > fb_height || src_h 88 drivers/gpu/drm/drm_framebuffer.c src_y > fb_height - src_h) { src_h 92 drivers/gpu/drm/drm_framebuffer.c src_h >> 16, ((src_h & 0xffff) * 15625) >> 10, src_h 602 drivers/gpu/drm/drm_plane.c uint32_t src_w, uint32_t src_h) src_h 635 drivers/gpu/drm/drm_plane.c ret = drm_framebuffer_check_src_coords(src_x, src_y, src_w, src_h, fb); src_h 680 drivers/gpu/drm/drm_plane.c uint32_t src_w, uint32_t src_h, src_h 702 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h); src_h 709 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h, ctx); src_h 732 drivers/gpu/drm/drm_plane.c uint32_t src_w, uint32_t src_h, src_h 752 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h); src_h 758 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h, ctx); src_h 768 drivers/gpu/drm/drm_plane.c uint32_t src_w, uint32_t src_h) src_h 779 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h, &ctx); src_h 783 drivers/gpu/drm/drm_plane.c src_x, src_y, src_w, src_h, &ctx); src_h 834 drivers/gpu/drm/drm_plane.c plane_req->src_w, plane_req->src_h); src_h 859 drivers/gpu/drm/drm_plane.c uint32_t src_w = 0, src_h = 0; src_h 905 drivers/gpu/drm/drm_plane.c src_h = fb->height << 16; src_h 911 drivers/gpu/drm/drm_plane.c 0, 0, src_w, src_h, ctx); src_h 915 drivers/gpu/drm/drm_plane.c 0, 0, src_w, src_h, ctx); src_h 1147 drivers/gpu/drm/drm_plane.c state->src_h, src_h 120 drivers/gpu/drm/drm_plane_helper.c .src_h = drm_rect_height(src), src_h 154 drivers/gpu/drm/drm_plane_helper.c uint32_t src_w, uint32_t src_h, src_h 168 drivers/gpu/drm/drm_plane_helper.c .y2 = src_y + src_h, src_h 203 drivers/gpu/drm/drm_rect.c int src_h = drm_rect_height(src); src_h 205 drivers/gpu/drm/drm_rect.c int vscale = drm_calc_scale(src_h, dst_h); src_h 746 drivers/gpu/drm/exynos/exynos_drm_fimc.c u32 src_w, src_h, dst_w, dst_h; src_h 751 drivers/gpu/drm/exynos/exynos_drm_fimc.c src_h = src->w; src_h 754 drivers/gpu/drm/exynos/exynos_drm_fimc.c src_h = src->h; src_h 772 drivers/gpu/drm/exynos/exynos_drm_fimc.c vfactor = fls(src_h / dst_h / 2); src_h 779 drivers/gpu/drm/exynos/exynos_drm_fimc.c pre_dst_height = src_h >> vfactor; src_h 786 drivers/gpu/drm/exynos/exynos_drm_fimc.c sc->vratio = (src_h << 14) / (dst_h << vfactor); src_h 788 drivers/gpu/drm/exynos/exynos_drm_fimc.c sc->up_v = (dst_h >= src_h) ? true : false; src_h 748 drivers/gpu/drm/exynos/exynos_drm_gsc.c u32 src_w, src_h, dst_w, dst_h; src_h 752 drivers/gpu/drm/exynos/exynos_drm_gsc.c src_h = src->h; src_h 768 drivers/gpu/drm/exynos/exynos_drm_gsc.c ret = gsc_get_ratio_shift(ctx, src_h, dst_h, &sc->pre_vratio); src_h 778 drivers/gpu/drm/exynos/exynos_drm_gsc.c sc->main_vratio = (src_h << 16) / dst_h; src_h 65 drivers/gpu/drm/exynos/exynos_drm_plane.c unsigned int src_w, src_h; src_h 83 drivers/gpu/drm/exynos/exynos_drm_plane.c src_h = state->src_h >> 16; src_h 87 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->v_ratio = (src_h << 16) / crtc_h; src_h 64 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c u32 src_h = state->src_h >> 16; src_h 73 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c if (src_w != state->crtc_w || src_h != state->crtc_h) { src_h 713 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c u32 src_y, u32 src_w, u32 src_h) src_h 723 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c ch + 1, src_x, src_y, src_w, src_h, src_h 728 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c in_h = src_h; src_h 769 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c u32 src_h = state->src_h >> 16; src_h 787 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c if (src_w != crtc_w || src_h != crtc_h) { src_h 792 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c src_y + src_h > fb->height) src_h 814 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c state->src_w >> 16, state->src_h >> 16); src_h 2804 drivers/gpu/drm/i915/display/intel_display.c unsigned int src_w, src_h; src_h 2814 drivers/gpu/drm/i915/display/intel_display.c src_h = drm_rect_height(&plane_state->base.src) >> 16; src_h 2825 drivers/gpu/drm/i915/display/intel_display.c src_w << 16, src_h << 16, src_h 2843 drivers/gpu/drm/i915/display/intel_display.c height = src_h / vsub; src_h 3257 drivers/gpu/drm/i915/display/intel_display.c plane_state->src_h = fb->height << 16; src_h 3706 drivers/gpu/drm/i915/display/intel_display.c int src_h = drm_rect_height(&plane_state->base.src) >> 16; src_h 3710 drivers/gpu/drm/i915/display/intel_display.c src_y += src_h - 1; src_h 5410 drivers/gpu/drm/i915/display/intel_display.c int src_w, int src_h, int dst_w, int dst_h, src_h 5426 drivers/gpu/drm/i915/display/intel_display.c if (src_w != dst_w || src_h != dst_h) src_h 5466 drivers/gpu/drm/i915/display/intel_display.c (src_h < SKL_MIN_YUV_420_SRC_H || src_w < SKL_MIN_YUV_420_SRC_W)) { src_h 5472 drivers/gpu/drm/i915/display/intel_display.c if (src_w < SKL_MIN_SRC_W || src_h < SKL_MIN_SRC_H || src_h 5475 drivers/gpu/drm/i915/display/intel_display.c (src_w > ICL_MAX_SRC_W || src_h > ICL_MAX_SRC_H || src_h 5478 drivers/gpu/drm/i915/display/intel_display.c (src_w > SKL_MAX_SRC_W || src_h > SKL_MAX_SRC_H || src_h 5482 drivers/gpu/drm/i915/display/intel_display.c intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h); src_h 5490 drivers/gpu/drm/i915/display/intel_display.c intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h, src_h 11494 drivers/gpu/drm/i915/display/intel_display.c int src_h = drm_rect_height(&state->base.src) >> 16; src_h 11498 drivers/gpu/drm/i915/display/intel_display.c return (src_w != dst_w || src_h != dst_h); src_h 14691 drivers/gpu/drm/i915/display/intel_display.c u32 src_w, u32 src_h, src_h 14727 drivers/gpu/drm/i915/display/intel_display.c old_plane_state->src_h != src_h || src_h 14748 drivers/gpu/drm/i915/display/intel_display.c new_plane_state->src_h = src_h; src_h 14810 drivers/gpu/drm/i915/display/intel_display.c src_x, src_y, src_w, src_h, ctx); src_h 82 drivers/gpu/drm/i915/display/intel_fbc.c *height = cache->plane.src_h; src_h 680 drivers/gpu/drm/i915/display/intel_fbc.c cache->plane.src_h = drm_rect_height(&plane_state->base.src) >> 16; src_h 289 drivers/gpu/drm/i915/display/intel_sprite.c u32 src_x, src_y, src_w, src_h, hsub, vsub; src_h 301 drivers/gpu/drm/i915/display/intel_sprite.c src_h = drm_rect_height(src) >> 16; src_h 306 drivers/gpu/drm/i915/display/intel_sprite.c src->y2 = (src_y + src_h) << 16; src_h 325 drivers/gpu/drm/i915/display/intel_sprite.c if (src_y % vsub || src_h % vsub) { src_h 327 drivers/gpu/drm/i915/display/intel_sprite.c src_y, src_h, vsub, rotated ? "rotated " : ""); src_h 556 drivers/gpu/drm/i915/display/intel_sprite.c u32 src_h = drm_rect_height(&plane_state->base.src) >> 16; src_h 572 drivers/gpu/drm/i915/display/intel_sprite.c src_h--; src_h 590 drivers/gpu/drm/i915/display/intel_sprite.c I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w); src_h 1164 drivers/gpu/drm/i915/display/intel_sprite.c u32 src_h = drm_rect_height(&plane_state->base.src) >> 16; src_h 1172 drivers/gpu/drm/i915/display/intel_sprite.c src_h--; src_h 1176 drivers/gpu/drm/i915/display/intel_sprite.c if (crtc_w != src_w || crtc_h != src_h) src_h 1177 drivers/gpu/drm/i915/display/intel_sprite.c sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h; src_h 1417 drivers/gpu/drm/i915/display/intel_sprite.c u32 src_h = drm_rect_height(&plane_state->base.src) >> 16; src_h 1425 drivers/gpu/drm/i915/display/intel_sprite.c src_h--; src_h 1429 drivers/gpu/drm/i915/display/intel_sprite.c if (crtc_w != src_w || crtc_h != src_h) src_h 1430 drivers/gpu/drm/i915/display/intel_sprite.c dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h; src_h 1528 drivers/gpu/drm/i915/display/intel_sprite.c int src_x, src_w, src_h, crtc_w, crtc_h; src_h 1541 drivers/gpu/drm/i915/display/intel_sprite.c src_h = drm_rect_height(src) >> 16; src_h 1543 drivers/gpu/drm/i915/display/intel_sprite.c if (src_w == crtc_w && src_h == crtc_h) src_h 1549 drivers/gpu/drm/i915/display/intel_sprite.c if (src_h & 1) { src_h 1560 drivers/gpu/drm/i915/display/intel_sprite.c if (src_w < min_width || src_h < min_height || src_h 1561 drivers/gpu/drm/i915/display/intel_sprite.c src_w > 2048 || src_h > 2048) { src_h 1563 drivers/gpu/drm/i915/display/intel_sprite.c src_w, src_h, min_width, min_height, 2048, 2048); src_h 2682 drivers/gpu/drm/i915/i915_debugfs.c (state->src_h >> 16), src_h 2683 drivers/gpu/drm/i915/i915_debugfs.c ((state->src_h & 0xffff) * 15625) >> 10, src_h 389 drivers/gpu/drm/i915/i915_drv.h int src_h; src_h 4075 drivers/gpu/drm/i915/intel_pm.c u32 src_w, src_h, dst_w, dst_h; src_h 4089 drivers/gpu/drm/i915/intel_pm.c src_h = plane_state->base.src_h >> 16; src_h 4099 drivers/gpu/drm/i915/intel_pm.c src_h = drm_rect_height(&plane_state->base.src) >> 16; src_h 4105 drivers/gpu/drm/i915/intel_pm.c fp_h_ratio = div_fixed16(src_h, dst_h); src_h 4121 drivers/gpu/drm/i915/intel_pm.c u32 src_w, src_h, dst_w, dst_h; src_h 4127 drivers/gpu/drm/i915/intel_pm.c src_h = crtc_state->pipe_src_h; src_h 4135 drivers/gpu/drm/i915/intel_pm.c fp_h_ratio = div_fixed16(src_h, dst_h); src_h 42 drivers/gpu/drm/imx/ipuv3-plane.h uint32_t src_h, bool interlaced); src_h 171 drivers/gpu/drm/meson/meson_overlay.c h_in = fixed16_to_int(state->src_h); src_h 115 drivers/gpu/drm/meson/meson_plane.c int src_w, src_h, dst_w, dst_h; src_h 200 drivers/gpu/drm/meson/meson_plane.c src_h = fixed16_to_int(state->src_h); src_h 218 drivers/gpu/drm/meson/meson_plane.c vf_phase_step = (src_h << 20) / dst_h; src_h 228 drivers/gpu/drm/meson/meson_plane.c if (src_h != dst_h || src_w != dst_w) { src_h 230 drivers/gpu/drm/meson/meson_plane.c SCI_WH_M1_H(src_h - 1); src_h 245 drivers/gpu/drm/meson/meson_plane.c if (src_h != dst_h) { src_h 1157 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c state->src_x, state->src_y, state->src_w, state->src_h); src_h 442 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h, src_h 455 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c mult_frac((1 << PHASE_STEP_SHIFT), src_h, dst_h); src_h 475 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c scale_cfg->src_height[i] = src_h; src_h 487 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (!(DPU_FORMAT_IS_YUV(fmt)) && (src_h == dst_h) src_h 675 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c src[i].y2 = src[i].y1 + (drm_state[i]->src_h >> 16); src_h 870 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c src.y2 = src.y1 + (state->src_h >> 16); src_h 1274 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c plane->state->src_h >> 16, src_h 51 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c uint32_t src_w, uint32_t src_h); src_h 125 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c state->src_w, state->src_h); src_h 197 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c uint32_t src_w, uint32_t src_h) src_h 220 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c src_h = src_h >> 16; src_h 223 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c fb->base.id, src_x, src_y, src_w, src_h, src_h 233 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c if (src_h > (crtc_h * DOWN_SCALE_MAX)) { src_h 243 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c if (crtc_h > (src_h * UP_SCALE_MAX)) { src_h 264 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c if (src_h != crtc_h) { src_h 270 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c if (crtc_h > src_h) src_h 272 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c else if (crtc_h <= (src_h / 4)) src_h 277 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c src_h, crtc_h); src_h 283 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c MDP4_PIPE_SRC_SIZE_HEIGHT(src_h)); src_h 333 drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h)); src_h 275 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c if (state->src_h > max_height) src_h 318 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ((state->src_h >> 16) != state->crtc_h)) src_h 465 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c plane->state->src_h != state->src_h || src_h 747 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c uint32_t src_h, int pe_top[COMP_MAX], int pe_bottom[COMP_MAX]) src_h 755 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c uint32_t roi_h = src_h; src_h 827 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c u32 src_w, u32 src_h) src_h 840 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c MDP5_PIPE_SRC_SIZE_HEIGHT(src_h)); src_h 884 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_h, pe->top, pe->bottom); src_h 933 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c uint32_t src_w, src_h; src_h 949 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_h = drm_rect_height(src); src_h 960 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_h = src_h >> 16; src_h 963 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_img_h = min(fb->height, src_h); src_h 966 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c fb->base.id, src_x, src_y, src_w, src_h, src_h 985 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c ret = calc_scaley_steps(plane, pix_format, src_h, crtc_h, step.y); src_h 992 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c calc_pixel_ext(format, src_h, crtc_h, step.y, src_h 1000 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c config |= get_scale_config(format, src_h, crtc_h, false); src_h 1014 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_x, src_y, src_w, src_h); src_h 1020 drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c src_x + src_w, src_y, src_w, src_h); src_h 93 drivers/gpu/drm/nouveau/dispnv04/overlay.c uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h, src_h 96 drivers/gpu/drm/nouveau/dispnv04/overlay.c if (crtc_w < (src_w >> shift) || crtc_h < (src_h >> shift)) { src_h 98 drivers/gpu/drm/nouveau/dispnv04/overlay.c src_w, src_h, crtc_w, crtc_h); src_h 116 drivers/gpu/drm/nouveau/dispnv04/overlay.c uint32_t src_w, uint32_t src_h, src_h 137 drivers/gpu/drm/nouveau/dispnv04/overlay.c src_h >>= 16; src_h 139 drivers/gpu/drm/nouveau/dispnv04/overlay.c ret = verify_scaling(fb, shift, 0, 0, src_w, src_h, crtc_w, crtc_h); src_h 154 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); src_h 157 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_wr32(dev, NV_PVIDEO_DT_DY(flip), (src_h << 20) / crtc_h); src_h 365 drivers/gpu/drm/nouveau/dispnv04/overlay.c uint32_t src_w, uint32_t src_h, src_h 381 drivers/gpu/drm/nouveau/dispnv04/overlay.c src_h >>= 16; src_h 383 drivers/gpu/drm/nouveau/dispnv04/overlay.c ret = verify_scaling(fb, 0, src_x, src_y, src_w, src_h, crtc_w, crtc_h); src_h 407 drivers/gpu/drm/nouveau/dispnv04/overlay.c (uint32_t)(((src_h - 1) << 11) / (crtc_h - 1)) << 16 | (uint32_t)(((src_w - 1) << 11) / (crtc_w - 1))); src_h 282 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->scale.sh = asyw->state.src_h >> 16; src_h 142 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c evo_data(push, (asyw->state.src_h >> 16) << 16 | src_h 55 drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c evo_data(push, (asyw->state.src_h >> 16) << 16 | src_h 148 drivers/gpu/drm/omapdrm/omap_fb.c info->height = state->src_h >> 16; src_h 159 drivers/gpu/drm/omapdrm/omap_fb.c u32 h = state->src_h >> 16; src_h 1695 drivers/gpu/drm/radeon/radeon_display.c u32 src_h = 1, dst_h = 1; src_h 1722 drivers/gpu/drm/radeon/radeon_display.c src_h = crtc->mode.hdisplay; src_h 1743 drivers/gpu/drm/radeon/radeon_display.c src_h = crtc->mode.hdisplay; src_h 1765 drivers/gpu/drm/radeon/radeon_display.c a.full = dfixed_const(src_h); src_h 311 drivers/gpu/drm/rockchip/rockchip_drm_vop.c uint32_t src_w, uint32_t src_h, uint32_t dst_w, src_h 319 drivers/gpu/drm/rockchip/rockchip_drm_vop.c uint16_t cbcr_src_h = src_h / info->vsub; src_h 337 drivers/gpu/drm/rockchip/rockchip_drm_vop.c scl_cal_scale2(src_h, dst_h)); src_h 348 drivers/gpu/drm/rockchip/rockchip_drm_vop.c yrgb_ver_scl_mode = scl_get_scl_mode(src_h, dst_h); src_h 384 drivers/gpu/drm/rockchip/rockchip_drm_vop.c val = scl_vop_cal_scale(yrgb_ver_scl_mode, src_h, dst_h, src_h 960 drivers/gpu/drm/rockchip/rockchip_drm_vop.c plane->state->src_h = new_state->src_h; src_h 320 drivers/gpu/drm/rockchip/rockchip_drm_vop.h static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h, src_h 325 drivers/gpu/drm/rockchip/rockchip_drm_vop.h act_height = (src_h + vskiplines - 1) / vskiplines; src_h 328 drivers/gpu/drm/rockchip/rockchip_drm_vop.h return GET_SCL_FT_BILI_DN(src_h, dst_h) / vskiplines; src_h 16 drivers/gpu/drm/selftests/test-drm_plane_helper.c unsigned src_w, unsigned src_h) src_h 21 drivers/gpu/drm/selftests/test-drm_plane_helper.c plane_state->src_h = src_h; src_h 26 drivers/gpu/drm/selftests/test-drm_plane_helper.c unsigned src_w, unsigned src_h) src_h 42 drivers/gpu/drm/selftests/test-drm_plane_helper.c drm_rect_height(&plane_state->src) != src_h) { src_h 174 drivers/gpu/drm/shmobile/shmob_drm_plane.c uint32_t src_w, uint32_t src_h, src_h 188 drivers/gpu/drm/shmobile/shmob_drm_plane.c if (src_w >> 16 != crtc_w || src_h >> 16 != crtc_h) { src_h 193 drivers/gpu/drm/sti/sti_cursor.c int src_w, src_h; src_h 207 drivers/gpu/drm/sti/sti_cursor.c src_h = state->src_h >> 16; src_h 210 drivers/gpu/drm/sti/sti_cursor.c src_h < STI_CURS_MIN_SIZE || src_h 212 drivers/gpu/drm/sti/sti_cursor.c src_h > STI_CURS_MAX_SIZE) { src_h 214 drivers/gpu/drm/sti/sti_cursor.c src_w, src_h); src_h 221 drivers/gpu/drm/sti/sti_cursor.c (cursor->height != src_h)) { src_h 223 drivers/gpu/drm/sti/sti_cursor.c cursor->height = src_h; src_h 627 drivers/gpu/drm/sti/sti_gdp.c int src_x, src_y, src_w, src_h; src_h 645 drivers/gpu/drm/sti/sti_gdp.c src_h = clamp_val(state->src_h >> 16, 0, GAM_GDP_SIZE_MAX_HEIGHT); src_h 691 drivers/gpu/drm/sti/sti_gdp.c src_w, src_h, src_x, src_y); src_h 706 drivers/gpu/drm/sti/sti_gdp.c int src_x, src_y, src_w, src_h; src_h 728 drivers/gpu/drm/sti/sti_gdp.c (oldstate->src_h == state->src_h)) { src_h 754 drivers/gpu/drm/sti/sti_gdp.c src_h = clamp_val(state->src_h >> 16, 0, GAM_GDP_SIZE_MAX_HEIGHT); src_h 785 drivers/gpu/drm/sti/sti_gdp.c dst_h = sti_gdp_get_dst(gdp->dev, dst_h, src_h); src_h 796 drivers/gpu/drm/sti/sti_gdp.c top_field->gam_gdp_size = src_h << 16 | src_w; src_h 480 drivers/gpu/drm/sti/sti_hqvdp.c int src_w, src_h, dst_w, dst_h; src_h 513 drivers/gpu/drm/sti/sti_hqvdp.c src_h = c->top.input_viewport_size >> 16; src_h 514 drivers/gpu/drm/sti/sti_hqvdp.c seq_printf(s, "\t%dx%d", src_w, src_h); src_h 540 drivers/gpu/drm/sti/sti_hqvdp.c if (dst_h > src_h) src_h 541 drivers/gpu/drm/sti/sti_hqvdp.c seq_printf(s, " %d/1", dst_h / src_h); src_h 543 drivers/gpu/drm/sti/sti_hqvdp.c seq_printf(s, " 1/%d", src_h / dst_h); src_h 734 drivers/gpu/drm/sti/sti_hqvdp.c int src_w, int src_h, src_h 743 drivers/gpu/drm/sti/sti_hqvdp.c inv_zy = DIV_ROUND_UP(src_h, dst_h); src_h 1029 drivers/gpu/drm/sti/sti_hqvdp.c int src_x, src_y, src_w, src_h; src_h 1045 drivers/gpu/drm/sti/sti_hqvdp.c src_h = state->src_h >> 16; src_h 1048 drivers/gpu/drm/sti/sti_hqvdp.c src_w, src_h, src_h 1067 drivers/gpu/drm/sti/sti_hqvdp.c (src_h > MAX_HEIGHT) || (src_h < MIN_HEIGHT) || src_h 1071 drivers/gpu/drm/sti/sti_hqvdp.c src_w, src_h, src_h 1104 drivers/gpu/drm/sti/sti_hqvdp.c src_w, src_h, src_x, src_y); src_h 1119 drivers/gpu/drm/sti/sti_hqvdp.c int src_x, src_y, src_w, src_h; src_h 1136 drivers/gpu/drm/sti/sti_hqvdp.c (oldstate->src_h == state->src_h)) { src_h 1152 drivers/gpu/drm/sti/sti_hqvdp.c src_h = state->src_h >> 16; src_h 1195 drivers/gpu/drm/sti/sti_hqvdp.c cmd->top.input_viewport_size = src_h << 16 | src_w; src_h 1196 drivers/gpu/drm/sti/sti_hqvdp.c cmd->top.input_frame_size = src_h << 16 | src_w; src_h 1206 drivers/gpu/drm/sti/sti_hqvdp.c cmd->top.input_frame_size = (src_h / 2) << 16 | src_w; src_h 1222 drivers/gpu/drm/sti/sti_hqvdp.c scale_v = SCALE_FACTOR * dst_h / src_h; src_h 148 drivers/gpu/drm/sti/sti_vid.c int src_h = state->src_h >> 16; src_h 170 drivers/gpu/drm/sti/sti_vid.c if (src_h >= VID_MIN_HD_HEIGHT) { src_h 738 drivers/gpu/drm/stm/ltdc.c u32 src_w, src_h; src_h 747 drivers/gpu/drm/stm/ltdc.c src_h = state->src_h >> 16; src_h 750 drivers/gpu/drm/stm/ltdc.c if (src_w != state->crtc_w || src_h != state->crtc_h) { src_h 769 drivers/gpu/drm/stm/ltdc.c u32 src_x, src_y, src_w, src_h; src_h 782 drivers/gpu/drm/stm/ltdc.c src_h = state->src_h >> 16; src_h 786 drivers/gpu/drm/stm/ltdc.c src_w, src_h, src_x, src_y, src_h 412 drivers/gpu/drm/sun4i/sun4i_backend.c u16 src_h = state->src_h >> 16; src_h 416 drivers/gpu/drm/sun4i/sun4i_backend.c src_w, src_h, state->crtc_w, state->crtc_h); src_h 418 drivers/gpu/drm/sun4i/sun4i_backend.c if ((state->crtc_h != src_h) || (state->crtc_w != src_w)) src_h 507 drivers/gpu/drm/sun4i/sun4i_frontend.c luma_height = state->src_h >> 16; src_h 80 drivers/gpu/drm/sun4i/sun8i_ui_layer.c u32 src_w, src_h, dst_w, dst_h; src_h 92 drivers/gpu/drm/sun4i/sun8i_ui_layer.c src_h = drm_rect_height(&state->src) >> 16; src_h 99 drivers/gpu/drm/sun4i/sun8i_ui_layer.c insize = SUN8I_MIXER_SIZE(src_w, src_h); src_h 135 drivers/gpu/drm/sun4i/sun8i_ui_layer.c DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); src_h 149 drivers/gpu/drm/sun4i/sun8i_ui_layer.c vscale = state->src_h / state->crtc_h; src_h 151 drivers/gpu/drm/sun4i/sun8i_ui_layer.c sun8i_ui_scaler_setup(mixer, channel, src_w, src_h, dst_w, src_h 149 drivers/gpu/drm/sun4i/sun8i_ui_scaler.c u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, src_h 166 drivers/gpu/drm/sun4i/sun8i_ui_scaler.c insize = SUN8I_UI_SCALER_SIZE(src_w, src_h); src_h 40 drivers/gpu/drm/sun4i/sun8i_ui_scaler.h u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, src_h 74 drivers/gpu/drm/sun4i/sun8i_vi_layer.c u32 src_w, src_h, dst_w, dst_h; src_h 89 drivers/gpu/drm/sun4i/sun8i_vi_layer.c src_h = drm_rect_height(&state->src) >> 16; src_h 111 drivers/gpu/drm/sun4i/sun8i_vi_layer.c src_h = (src_h + remainder) & ~mask; src_h 115 drivers/gpu/drm/sun4i/sun8i_vi_layer.c insize = SUN8I_MIXER_SIZE(src_w, src_h); src_h 122 drivers/gpu/drm/sun4i/sun8i_vi_layer.c DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); src_h 151 drivers/gpu/drm/sun4i/sun8i_vi_layer.c required = src_h * 100 / dst_h; src_h 155 drivers/gpu/drm/sun4i/sun8i_vi_layer.c vm = src_h; src_h 157 drivers/gpu/drm/sun4i/sun8i_vi_layer.c src_h = vn; src_h 171 drivers/gpu/drm/sun4i/sun8i_vi_layer.c vscale = (src_h << 16) / dst_h; src_h 173 drivers/gpu/drm/sun4i/sun8i_vi_layer.c sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w, src_h 927 drivers/gpu/drm/sun4i/sun8i_vi_scaler.c u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, src_h 942 drivers/gpu/drm/sun4i/sun8i_vi_scaler.c insize = SUN8I_VI_SCALER_SIZE(src_w, src_h); src_h 986 drivers/gpu/drm/sun4i/sun8i_vi_scaler.c src_h / format->vsub)); src_h 74 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, src_h 819 drivers/gpu/drm/tegra/dc.c (state->src_h >> 16 != state->crtc_h)) src_h 823 drivers/gpu/drm/tegra/dc.c if (state->src_w != state->src_h) src_h 376 drivers/gpu/drm/vc4/vc4_drv.h u32 src_w[2], src_h[2]; src_h 345 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->src_h[0] = (state->src.y2 - state->src.y1) >> 16; src_h 358 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0], src_h 368 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->src_h[1] = vc4_state->src_h[0] / v_subsample; src_h 374 drivers/gpu/drm/vc4/vc4_plane.c vc4_get_scaling_mode(vc4_state->src_h[1], src_h 470 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->src_h[channel], vc4_state->crtc_h); src_h 483 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->src_h[channel], vc4_state->crtc_h); src_h 530 drivers/gpu/drm/vc4/vc4_plane.c vscale_factor = DIV_ROUND_UP(vc4_state->src_h[i], src_h 533 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->src_h[i] * vscale_factor * src_h 632 drivers/gpu/drm/vc4/vc4_plane.c src_y += vc4_state->src_h[0] - 1; src_h 825 drivers/gpu/drm/vc4/vc4_plane.c VC4_SET_FIELD(vc4_state->src_h[0], SCALER_POS2_HEIGHT)); src_h 1031 drivers/gpu/drm/vc4/vc4_plane.c plane->state->src_h = state->src_h; src_h 1032 drivers/gpu/drm/vc4/vc4_plane.c plane->state->src_h = state->src_h; src_h 1055 drivers/gpu/drm/vc4/vc4_plane.c memcpy(vc4_state->src_h, new_vc4_state->src_h, src_h 1056 drivers/gpu/drm/vc4/vc4_plane.c sizeof(vc4_state->src_h)); src_h 115 drivers/gpu/drm/virtio/virtgpu_plane.c cpu_to_le32(plane->state->src_h >> 16), src_h 127 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_h >> 16, src_h 132 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_h >> 16, src_h 140 drivers/gpu/drm/virtio/virtgpu_plane.c plane->state->src_h >> 16); src_h 148 drivers/gpu/drm/zte/zx_plane.c u32 src_w, u32 src_h, u32 dst_w, u32 dst_h) src_h 152 drivers/gpu/drm/zte/zx_plane.c u32 src_chroma_h = src_h; src_h 156 drivers/gpu/drm/zte/zx_plane.c zx_writel(rsz + RSZ_SRC_CFG, RSZ_VER(src_h - 1) | RSZ_HOR(src_w - 1)); src_h 167 drivers/gpu/drm/zte/zx_plane.c src_chroma_h = src_h >> 1; src_h 174 drivers/gpu/drm/zte/zx_plane.c zx_writel(rsz + RSZ_VL_LUMA_VER, rsz_step_value(src_h, dst_h)); src_h 194 drivers/gpu/drm/zte/zx_plane.c u32 src_x, src_y, src_w, src_h; src_h 208 drivers/gpu/drm/zte/zx_plane.c src_h = drm_rect_height(src) >> 16; src_h 227 drivers/gpu/drm/zte/zx_plane.c zx_writel(layer + VL_SRC_SIZE, GL_SRC_W(src_w) | GL_SRC_H(src_h)); src_h 249 drivers/gpu/drm/zte/zx_plane.c zx_vl_rsz_setup(zplane, format, src_w, src_h, dst_w, dst_h); src_h 338 drivers/gpu/drm/zte/zx_plane.c static void zx_gl_rsz_setup(struct zx_plane *zplane, u32 src_w, u32 src_h, src_h 343 drivers/gpu/drm/zte/zx_plane.c zx_writel(rsz + RSZ_SRC_CFG, RSZ_VER(src_h - 1) | RSZ_HOR(src_w - 1)); src_h 358 drivers/gpu/drm/zte/zx_plane.c u32 src_x, src_y, src_w, src_h; src_h 375 drivers/gpu/drm/zte/zx_plane.c src_h = plane->state->src_h >> 16; src_h 390 drivers/gpu/drm/zte/zx_plane.c zx_writel(layer + GL_SRC_SIZE, GL_SRC_W(src_w) | GL_SRC_H(src_h)); src_h 425 drivers/gpu/drm/zte/zx_plane.c zx_gl_rsz_setup(zplane, src_w, src_h, dst_w, dst_h); src_h 401 drivers/media/pci/ivtv/ivtv-driver.h u32 src_h; src_h 344 drivers/media/pci/ivtv/ivtv-irq.c u32 y_size = 720 * ((f->src_h + 31) & ~31); src_h 41 drivers/media/pci/ivtv/ivtv-yuv.c y_decode_height = uv_decode_height = f->src_h + f->src_y; src_h 395 drivers/media/pci/ivtv/ivtv-yuv.c f->tru_h, f->src_h, f->dst_h, f->src_y, f->dst_y); src_h 425 drivers/media/pci/ivtv/ivtv-yuv.c reg_2918 = (f->dst_h << 16) | (f->src_h + src_minor_y); src_h 427 drivers/media/pci/ivtv/ivtv-yuv.c reg_2918 = (f->dst_h << 16) | ((f->src_h + src_minor_y) << 1); src_h 430 drivers/media/pci/ivtv/ivtv-yuv.c reg_291c = (f->dst_h << 16) | ((f->src_h + src_minor_uv) >> 1); src_h 432 drivers/media/pci/ivtv/ivtv-yuv.c reg_291c = (f->dst_h << 16) | (f->src_h + src_minor_uv); src_h 434 drivers/media/pci/ivtv/ivtv-yuv.c reg_2964_base = (src_minor_y * ((f->dst_h << 16) / f->src_h)) >> 14; src_h 435 drivers/media/pci/ivtv/ivtv-yuv.c reg_2968_base = (src_minor_uv * ((f->dst_h << 16) / f->src_h)) >> 14; src_h 437 drivers/media/pci/ivtv/ivtv-yuv.c if (f->dst_h / 2 >= f->src_h && !f->interlaced_y) { src_h 438 drivers/media/pci/ivtv/ivtv-yuv.c master_height = (f->src_h * 0x00400000) / f->dst_h; src_h 439 drivers/media/pci/ivtv/ivtv-yuv.c if ((f->src_h * 0x00400000) - (master_height * f->dst_h) >= f->dst_h / 2) src_h 448 drivers/media/pci/ivtv/ivtv-yuv.c } else if (f->dst_h >= f->src_h) { src_h 449 drivers/media/pci/ivtv/ivtv-yuv.c master_height = (f->src_h * 0x00400000) / f->dst_h; src_h 465 drivers/media/pci/ivtv/ivtv-yuv.c } else if (f->dst_h >= f->src_h / 2) { src_h 466 drivers/media/pci/ivtv/ivtv-yuv.c master_height = (f->src_h * 0x00200000) / f->dst_h; src_h 483 drivers/media/pci/ivtv/ivtv-yuv.c master_height = (f->src_h * 0x00100000) / f->dst_h; src_h 496 drivers/media/pci/ivtv/ivtv-yuv.c if (f->src_h == f->dst_h) { src_h 531 drivers/media/pci/ivtv/ivtv-yuv.c reg_2960 = ((src_minor_y + f->src_h + src_major_y) - 1) | src_h 532 drivers/media/pci/ivtv/ivtv-yuv.c (((src_minor_uv + f->src_h + src_major_uv - 1) & ~1) << 15); src_h 535 drivers/media/pci/ivtv/ivtv-yuv.c if (f->src_h == f->dst_h) { src_h 538 drivers/media/pci/ivtv/ivtv-yuv.c reg_2964 = 2 + ((f->dst_h << 1) / f->src_h); src_h 553 drivers/media/pci/ivtv/ivtv-yuv.c if ((reg_2964 != 0x00010001) && (f->dst_h / 2 <= f->src_h)) src_h 565 drivers/media/pci/ivtv/ivtv-yuv.c if (f->src_h == f->dst_h) { src_h 571 drivers/media/pci/ivtv/ivtv-yuv.c v_filter_1 = ((f->src_h << 16) / f->dst_h) >> 15; src_h 679 drivers/media/pci/ivtv/ivtv-yuv.c if (f->src_h / f->dst_h >= 2) { src_h 684 drivers/media/pci/ivtv/ivtv-yuv.c if ((osd_crop = f->src_h - 4 * f->dst_h) > 0) { src_h 687 drivers/media/pci/ivtv/ivtv-yuv.c f->src_h = (f->src_h - osd_crop) & ~3; src_h 688 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_h = f->src_h / 4; src_h 695 drivers/media/pci/ivtv/ivtv-yuv.c (int)f->src_w <= 2 || (int)f->src_h <= 2) { src_h 700 drivers/media/pci/ivtv/ivtv-yuv.c osd_scale = (f->src_h << 16) / f->dst_h; src_h 705 drivers/media/pci/ivtv/ivtv-yuv.c f->src_h -= (osd_scale * osd_crop) >> 16; src_h 715 drivers/media/pci/ivtv/ivtv-yuv.c f->src_h -= (osd_scale * osd_crop) >> 16; src_h 756 drivers/media/pci/ivtv/ivtv-yuv.c f->src_h += f->src_y & 1; src_h 759 drivers/media/pci/ivtv/ivtv-yuv.c f->src_h &= ~1; src_h 770 drivers/media/pci/ivtv/ivtv-yuv.c if (f->dst_h < f->src_h / 4) { src_h 771 drivers/media/pci/ivtv/ivtv-yuv.c f->src_h &= ~3; src_h 772 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_h = f->src_h / 4; src_h 778 drivers/media/pci/ivtv/ivtv-yuv.c (int)f->src_w <= 2 || (int)f->src_h <= 2) { src_h 789 drivers/media/pci/ivtv/ivtv-yuv.c if ((of->src_h != f->src_h) || (of->dst_h != f->dst_h) || src_h 981 drivers/media/pci/ivtv/ivtv-yuv.c nf->src_h = args->src.height; src_h 1012 drivers/media/pci/ivtv/ivtv-yuv.c if (nf->tru_h < 1021 && (nf->dst_h >= nf->src_h / 2)) src_h 1027 drivers/media/pci/ivtv/ivtv-yuv.c if (nf->tru_h < 1021 && (nf->dst_h >= nf->src_h / 2)) src_h 1277 drivers/media/pci/ivtv/ivtv-yuv.c yi->old_frame_info.src_h = 0; src_h 1279 drivers/media/pci/ivtv/ivtv-yuv.c yi->old_frame_info_args.src_h = 0; src_h 847 drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c int src_h, int dst_w, int dst_h, int rot) src_h 860 drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c (src_h / tmp_h) > var->v_scale_down_max || src_h 862 drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c (tmp_h / src_h) > var->v_scale_up_max) src_h 166 drivers/media/platform/rockchip/rga/rga-hw.c unsigned int src_h, src_w, src_x, src_y, dst_h, dst_w, dst_x, dst_y; src_h 180 drivers/media/platform/rockchip/rga/rga-hw.c src_h = ctx->in.crop.height; src_h 259 drivers/media/platform/rockchip/rga/rga-hw.c if (dst_w == src_h) src_h 260 drivers/media/platform/rockchip/rga/rga-hw.c src_h -= 8; src_h 285 drivers/media/platform/rockchip/rga/rga-hw.c if (src_h == scale_dst_h) { src_h 288 drivers/media/platform/rockchip/rga/rga-hw.c } else if (src_h > scale_dst_h) { src_h 291 drivers/media/platform/rockchip/rga/rga-hw.c rga_get_scaling(src_h, scale_dst_h) + 1; src_h 295 drivers/media/platform/rockchip/rga/rga-hw.c rga_get_scaling(src_h - 1, scale_dst_h - 1); src_h 305 drivers/media/platform/rockchip/rga/rga-hw.c src_act_info.data.act_height = src_h - 1; src_h 316 drivers/media/platform/rockchip/rga/rga-hw.c src_w, src_h); src_h 630 drivers/media/platform/sti/bdisp/bdisp-hw.c u32 src_w, src_h, dst_w, dst_h; src_h 633 drivers/media/platform/sti/bdisp/bdisp-hw.c src_h = ctx->src.crop.height; src_h 638 drivers/media/platform/sti/bdisp/bdisp-hw.c bdisp_hw_get_inc(src_h, dst_h, v_inc)) { src_h 641 drivers/media/platform/sti/bdisp/bdisp-hw.c src_w, src_h, dst_w, dst_h); src_h 110 drivers/media/platform/ti-vpe/sc.c void sc_set_vs_coeffs(struct sc_data *sc, void *addr, unsigned int src_h, src_h 119 drivers/media/platform/ti-vpe/sc.c if (dst_h > src_h) { src_h 121 drivers/media/platform/ti-vpe/sc.c } else if (dst_h == src_h) { src_h 124 drivers/media/platform/ti-vpe/sc.c sixteenths = (dst_h << 4) / src_h; src_h 148 drivers/media/platform/ti-vpe/sc.c u32 *sc_reg17, unsigned int src_w, unsigned int src_h, src_h 178 drivers/media/platform/ti-vpe/sc.c if (src_w == dst_w && src_h == dst_h) { src_h 213 drivers/media/platform/ti-vpe/sc.c if (dst_h < (src_h >> 2)) { src_h 222 drivers/media/platform/ti-vpe/sc.c factor = (u16) ((dst_h << 10) / src_h); src_h 238 drivers/media/platform/ti-vpe/sc.c src_h, dst_h, factor, row_acc_init_rav, src_h 242 drivers/media/platform/ti-vpe/sc.c row_acc_inc = ((src_h - 1) << 16) / (dst_h - 1); src_h 247 drivers/media/platform/ti-vpe/sc.c src_h, dst_h, row_acc_inc); src_h 260 drivers/media/platform/ti-vpe/sc.c sc_reg0[5] = (src_w << CFG_SRC_W_SHIFT) | (src_h << CFG_SRC_H_SHIFT); src_h 271 drivers/media/platform/ti-vpe/sc.c *sc_reg24 = (src_w << CFG_ORG_W_SHIFT) | (src_h << CFG_ORG_H_SHIFT); src_h 201 drivers/media/platform/ti-vpe/sc.h void sc_set_vs_coeffs(struct sc_data *sc, void *addr, unsigned int src_h, src_h 204 drivers/media/platform/ti-vpe/sc.h u32 *sc_reg17, unsigned int src_w, unsigned int src_h, src_h 781 drivers/media/platform/ti-vpe/vpe.c unsigned int src_h = s_q_data->c_rect.height; src_h 798 drivers/media/platform/ti-vpe/vpe.c src_h = deinterlace ? src_h * 2 : src_h; src_h 800 drivers/media/platform/ti-vpe/vpe.c val |= (src_h << VPE_DEI_HEIGHT_SHIFT) | src_h 852 drivers/media/platform/ti-vpe/vpe.c unsigned int src_h = s_q_data->c_rect.height; src_h 879 drivers/media/platform/ti-vpe/vpe.c src_h <<= 1; src_h 899 drivers/media/platform/ti-vpe/vpe.c sc_set_vs_coeffs(ctx->dev->sc, ctx->sc_coeff_v.addr, src_h, dst_h); src_h 903 drivers/media/platform/ti-vpe/vpe.c src_w, src_h, dst_w, dst_h); src_h 2080 drivers/media/platform/ti-vpe/vpe.c unsigned int src_h = s_q_data->c_rect.height; src_h 2084 drivers/media/platform/ti-vpe/vpe.c if (src_w == dst_w && src_h == dst_h) src_h 2087 drivers/media/platform/ti-vpe/vpe.c if (src_h <= SC_MAX_PIXEL_HEIGHT && src_h 116 include/drm/drm_atomic_helper.h uint32_t src_w, uint32_t src_h, src_h 114 include/drm/drm_plane.h uint32_t src_h, src_w; src_h 217 include/drm/drm_plane.h .y2 = state->src_y + state->src_h, src_h 269 include/drm/drm_plane.h uint32_t src_w, uint32_t src_h, src_h 290 include/uapi/drm/drm_mode.h __u32 src_h;