srbm_gfx_cntl 871 drivers/gpu/drm/amd/amdgpu/cik.c u32 srbm_gfx_cntl = srbm_gfx_cntl 876 drivers/gpu/drm/amd/amdgpu/cik.c WREG32(mmSRBM_GFX_CNTL, srbm_gfx_cntl); srbm_gfx_cntl 362 drivers/gpu/drm/amd/amdgpu/vi.c u32 srbm_gfx_cntl = 0; srbm_gfx_cntl 363 drivers/gpu/drm/amd/amdgpu/vi.c srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, PIPEID, pipe); srbm_gfx_cntl 364 drivers/gpu/drm/amd/amdgpu/vi.c srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, MEID, me); srbm_gfx_cntl 365 drivers/gpu/drm/amd/amdgpu/vi.c srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, VMID, vmid); srbm_gfx_cntl 366 drivers/gpu/drm/amd/amdgpu/vi.c srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, QUEUEID, queue); srbm_gfx_cntl 367 drivers/gpu/drm/amd/amdgpu/vi.c WREG32(mmSRBM_GFX_CNTL, srbm_gfx_cntl); srbm_gfx_cntl 1857 drivers/gpu/drm/radeon/cik.c u32 srbm_gfx_cntl = (PIPEID(pipe & 0x3) | srbm_gfx_cntl 1861 drivers/gpu/drm/radeon/cik.c WREG32(SRBM_GFX_CNTL, srbm_gfx_cntl);