sq_dyn_gpr_size_simd_ab_0 1184 drivers/gpu/drm/radeon/rv770.c 	u32 sq_dyn_gpr_size_simd_ab_0;
sq_dyn_gpr_size_simd_ab_0 1523 drivers/gpu/drm/radeon/rv770.c 	sq_dyn_gpr_size_simd_ab_0 = (SIMDA_RING0((rdev->config.rv770.max_gprs * 38)/64) |
sq_dyn_gpr_size_simd_ab_0 1528 drivers/gpu/drm/radeon/rv770.c 	WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_0, sq_dyn_gpr_size_simd_ab_0);
sq_dyn_gpr_size_simd_ab_0 1529 drivers/gpu/drm/radeon/rv770.c 	WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_1, sq_dyn_gpr_size_simd_ab_0);
sq_dyn_gpr_size_simd_ab_0 1530 drivers/gpu/drm/radeon/rv770.c 	WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_2, sq_dyn_gpr_size_simd_ab_0);
sq_dyn_gpr_size_simd_ab_0 1531 drivers/gpu/drm/radeon/rv770.c 	WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_3, sq_dyn_gpr_size_simd_ab_0);
sq_dyn_gpr_size_simd_ab_0 1532 drivers/gpu/drm/radeon/rv770.c 	WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_4, sq_dyn_gpr_size_simd_ab_0);
sq_dyn_gpr_size_simd_ab_0 1533 drivers/gpu/drm/radeon/rv770.c 	WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_5, sq_dyn_gpr_size_simd_ab_0);
sq_dyn_gpr_size_simd_ab_0 1534 drivers/gpu/drm/radeon/rv770.c 	WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_6, sq_dyn_gpr_size_simd_ab_0);
sq_dyn_gpr_size_simd_ab_0 1535 drivers/gpu/drm/radeon/rv770.c 	WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_7, sq_dyn_gpr_size_simd_ab_0);