sq_config 3139 drivers/gpu/drm/radeon/evergreen.c u32 sq_config; sq_config 3570 drivers/gpu/drm/radeon/evergreen.c sq_config = RREG32(SQ_CONFIG); sq_config 3571 drivers/gpu/drm/radeon/evergreen.c sq_config &= ~(PS_PRIO(3) | sq_config 3575 drivers/gpu/drm/radeon/evergreen.c sq_config |= (VC_ENABLE | sq_config 3589 drivers/gpu/drm/radeon/evergreen.c sq_config &= ~VC_ENABLE; sq_config 3631 drivers/gpu/drm/radeon/evergreen.c WREG32(SQ_CONFIG, sq_config); sq_config 1997 drivers/gpu/drm/radeon/r600.c u32 sq_config; sq_config 2204 drivers/gpu/drm/radeon/r600.c sq_config = RREG32(SQ_CONFIG); sq_config 2205 drivers/gpu/drm/radeon/r600.c sq_config &= ~(PS_PRIO(3) | sq_config 2209 drivers/gpu/drm/radeon/r600.c sq_config |= (DX9_CONSTS | sq_config 2235 drivers/gpu/drm/radeon/r600.c sq_config &= ~VC_ENABLE; sq_config 2281 drivers/gpu/drm/radeon/r600.c WREG32(SQ_CONFIG, sq_config); sq_config 45 drivers/gpu/drm/radeon/r600_cs.c u32 sq_config; sq_config 305 drivers/gpu/drm/radeon/r600_cs.c track->sq_config = DX9_CONSTS; sq_config 1026 drivers/gpu/drm/radeon/r600_cs.c track->sq_config = radeon_get_ib_value(p, idx); sq_config 2024 drivers/gpu/drm/radeon/r600_cs.c if (track->sq_config & DX9_CONSTS) { sq_config 1181 drivers/gpu/drm/radeon/rv770.c u32 sq_config; sq_config 1483 drivers/gpu/drm/radeon/rv770.c sq_config = RREG32(SQ_CONFIG); sq_config 1484 drivers/gpu/drm/radeon/rv770.c sq_config &= ~(PS_PRIO(3) | sq_config 1488 drivers/gpu/drm/radeon/rv770.c sq_config |= (DX9_CONSTS | sq_config 1497 drivers/gpu/drm/radeon/rv770.c sq_config &= ~VC_ENABLE; sq_config 1499 drivers/gpu/drm/radeon/rv770.c WREG32(SQ_CONFIG, sq_config);