spu_v_porch       264 drivers/gpu/drm/armada/armada_crtc.c 		writel_relaxed(dcrtc->v[i].spu_v_porch, base + LCD_SPU_V_PORCH);
spu_v_porch       361 drivers/gpu/drm/armada/armada_crtc.c 	dcrtc->v[1].spu_v_porch = tm << 16 | bm;
spu_v_porch       371 drivers/gpu/drm/armada/armada_crtc.c 		dcrtc->v[0].spu_v_porch = dcrtc->v[1].spu_v_porch + 1;
spu_v_porch       380 drivers/gpu/drm/armada/armada_crtc.c 	armada_reg_queue_set(regs, i, dcrtc->v[0].spu_v_porch, LCD_SPU_V_PORCH);
spu_v_porch        45 drivers/gpu/drm/armada/armada_crtc.h 		uint32_t	spu_v_porch;