spu_chnlcnt_RW 454 arch/powerpc/include/asm/spu.h u64 spu_chnlcnt_RW; /* 0x4068 */ spu_chnlcnt_RW 199 arch/powerpc/include/asm/spu_csa.h u64 spu_chnlcnt_RW; spu_chnlcnt_RW 234 arch/powerpc/include/asm/spu_csa.h u64 spu_chnlcnt_RW[32]; spu_chnlcnt_RW 470 arch/powerpc/platforms/cell/spu_base.c out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count); spu_chnlcnt_RW 40 arch/powerpc/platforms/cell/spufs/backing_ops.c ch0_cnt = ctx->csa.spu_chnlcnt_RW[0]; spu_chnlcnt_RW 45 arch/powerpc/platforms/cell/spufs/backing_ops.c ctx->csa.spu_chnlcnt_RW[0] = 1; spu_chnlcnt_RW 63 arch/powerpc/platforms/cell/spufs/backing_ops.c ctx->csa.spu_chnlcnt_RW[28] = 1; spu_chnlcnt_RW 127 arch/powerpc/platforms/cell/spufs/backing_ops.c ctx->csa.spu_chnlcnt_RW[30] = 1; spu_chnlcnt_RW 145 arch/powerpc/platforms/cell/spufs/backing_ops.c int slot = ctx->csa.spu_chnlcnt_RW[29]; spu_chnlcnt_RW 154 arch/powerpc/platforms/cell/spufs/backing_ops.c ctx->csa.spu_chnlcnt_RW[29] = ++slot; spu_chnlcnt_RW 182 arch/powerpc/platforms/cell/spufs/backing_ops.c ctx->csa.spu_chnlcnt_RW[3] = 1; spu_chnlcnt_RW 199 arch/powerpc/platforms/cell/spufs/backing_ops.c ctx->csa.spu_chnlcnt_RW[4] = 1; spu_chnlcnt_RW 979 arch/powerpc/platforms/cell/spufs/file.c if (ctx->csa.spu_chnlcnt_RW[3]) { spu_chnlcnt_RW 1116 arch/powerpc/platforms/cell/spufs/file.c if (ctx->csa.spu_chnlcnt_RW[4]) { spu_chnlcnt_RW 1864 arch/powerpc/platforms/cell/spufs/file.c stat = state->spu_chnlcnt_RW[0]; spu_chnlcnt_RW 634 arch/powerpc/platforms/cell/spufs/switch.c csa->spu_chnlcnt_RW[idx] = in_be64(&priv2->spu_chnlcnt_RW); spu_chnlcnt_RW 636 arch/powerpc/platforms/cell/spufs/switch.c out_be64(&priv2->spu_chnlcnt_RW, 0UL); spu_chnlcnt_RW 651 arch/powerpc/platforms/cell/spufs/switch.c csa->spu_chnlcnt_RW[29] = in_be64(&priv2->spu_chnlcnt_RW); spu_chnlcnt_RW 655 arch/powerpc/platforms/cell/spufs/switch.c out_be64(&priv2->spu_chnlcnt_RW, 0UL); spu_chnlcnt_RW 668 arch/powerpc/platforms/cell/spufs/switch.c csa->spu_chnlcnt_RW[21] = in_be64(&priv2->spu_chnlcnt_RW); spu_chnlcnt_RW 687 arch/powerpc/platforms/cell/spufs/switch.c out_be64(&priv2->spu_chnlcnt_RW, ch_counts[i]); spu_chnlcnt_RW 1085 arch/powerpc/platforms/cell/spufs/switch.c out_be64(&priv2->spu_chnlcnt_RW, 0UL); spu_chnlcnt_RW 1105 arch/powerpc/platforms/cell/spufs/switch.c out_be64(&priv2->spu_chnlcnt_RW, ch_counts[i]); spu_chnlcnt_RW 1529 arch/powerpc/platforms/cell/spufs/switch.c ch0_cnt = csa->spu_chnlcnt_RW[0]; spu_chnlcnt_RW 1535 arch/powerpc/platforms/cell/spufs/switch.c csa->spu_chnlcnt_RW[0] = 1; spu_chnlcnt_RW 1549 arch/powerpc/platforms/cell/spufs/switch.c if ((csa->spu_chnlcnt_RW[0] == 0) && spu_chnlcnt_RW 1552 arch/powerpc/platforms/cell/spufs/switch.c csa->spu_chnlcnt_RW[0] = 1; spu_chnlcnt_RW 1571 arch/powerpc/platforms/cell/spufs/switch.c out_be64(&priv2->spu_chnlcnt_RW, csa->spu_chnlcnt_RW[idx]); spu_chnlcnt_RW 1588 arch/powerpc/platforms/cell/spufs/switch.c ch_counts[1] = csa->spu_chnlcnt_RW[21]; spu_chnlcnt_RW 1594 arch/powerpc/platforms/cell/spufs/switch.c out_be64(&priv2->spu_chnlcnt_RW, ch_counts[i]); spu_chnlcnt_RW 1650 arch/powerpc/platforms/cell/spufs/switch.c out_be64(&priv2->spu_chnlcnt_RW, csa->spu_chnlcnt_RW[29]); spu_chnlcnt_RW 2137 arch/powerpc/platforms/cell/spufs/switch.c csa->spu_chnlcnt_RW[9] = 1; spu_chnlcnt_RW 2138 arch/powerpc/platforms/cell/spufs/switch.c csa->spu_chnlcnt_RW[21] = 16; spu_chnlcnt_RW 2139 arch/powerpc/platforms/cell/spufs/switch.c csa->spu_chnlcnt_RW[23] = 1; spu_chnlcnt_RW 2140 arch/powerpc/platforms/cell/spufs/switch.c csa->spu_chnlcnt_RW[28] = 1; spu_chnlcnt_RW 2141 arch/powerpc/platforms/cell/spufs/switch.c csa->spu_chnlcnt_RW[30] = 1;