spu_cfg_RW        456 arch/powerpc/include/asm/spu.h 	u64 spu_cfg_RW;						/* 0x4078 */
spu_cfg_RW        201 arch/powerpc/include/asm/spu_csa.h 	u64 spu_cfg_RW;
spu_cfg_RW        178 arch/powerpc/platforms/cell/spufs/backing_ops.c 	if (ctx->csa.priv2.spu_cfg_RW & 0x1)
spu_cfg_RW        195 arch/powerpc/platforms/cell/spufs/backing_ops.c 	if (ctx->csa.priv2.spu_cfg_RW & 0x2)
spu_cfg_RW        209 arch/powerpc/platforms/cell/spufs/backing_ops.c 	tmp = ctx->csa.priv2.spu_cfg_RW;
spu_cfg_RW        214 arch/powerpc/platforms/cell/spufs/backing_ops.c 	ctx->csa.priv2.spu_cfg_RW = tmp;
spu_cfg_RW        220 arch/powerpc/platforms/cell/spufs/backing_ops.c 	return ((ctx->csa.priv2.spu_cfg_RW & 1) != 0);
spu_cfg_RW        228 arch/powerpc/platforms/cell/spufs/backing_ops.c 	tmp = ctx->csa.priv2.spu_cfg_RW;
spu_cfg_RW        233 arch/powerpc/platforms/cell/spufs/backing_ops.c 	ctx->csa.priv2.spu_cfg_RW = tmp;
spu_cfg_RW        239 arch/powerpc/platforms/cell/spufs/backing_ops.c 	return ((ctx->csa.priv2.spu_cfg_RW & 2) != 0);
spu_cfg_RW        141 arch/powerpc/platforms/cell/spufs/hw_ops.c 	tmp = in_be64(&priv2->spu_cfg_RW);
spu_cfg_RW        146 arch/powerpc/platforms/cell/spufs/hw_ops.c 	out_be64(&priv2->spu_cfg_RW, tmp);
spu_cfg_RW        152 arch/powerpc/platforms/cell/spufs/hw_ops.c 	return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 1) != 0);
spu_cfg_RW        162 arch/powerpc/platforms/cell/spufs/hw_ops.c 	tmp = in_be64(&priv2->spu_cfg_RW);
spu_cfg_RW        167 arch/powerpc/platforms/cell/spufs/hw_ops.c 	out_be64(&priv2->spu_cfg_RW, tmp);
spu_cfg_RW        173 arch/powerpc/platforms/cell/spufs/hw_ops.c 	return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 2) != 0);
spu_cfg_RW        562 arch/powerpc/platforms/cell/spufs/switch.c 	csa->priv2.spu_cfg_RW = in_be64(&priv2->spu_cfg_RW);
spu_cfg_RW       1617 arch/powerpc/platforms/cell/spufs/switch.c 	out_be64(&priv2->spu_cfg_RW, csa->priv2.spu_cfg_RW);