spu_buff           37 arch/powerpc/oprofile/cell/spu_task_sync.c struct spu_buffer spu_buff[MAX_NUMNODES * SPUS_PER_NODE];
spu_buff           55 arch/powerpc/oprofile/cell/spu_task_sync.c 	if (spu_buff[spu].head >= spu_buff[spu].tail) {
spu_buff           56 arch/powerpc/oprofile/cell/spu_task_sync.c 		if ((spu_buff[spu].head - spu_buff[spu].tail)
spu_buff           60 arch/powerpc/oprofile/cell/spu_task_sync.c 	} else if (spu_buff[spu].tail > spu_buff[spu].head) {
spu_buff           61 arch/powerpc/oprofile/cell/spu_task_sync.c 		if ((spu_buff[spu].tail - spu_buff[spu].head)
spu_buff           67 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].buff[spu_buff[spu].head] = value;
spu_buff           68 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].head++;
spu_buff           70 arch/powerpc/oprofile/cell/spu_task_sync.c 		if (spu_buff[spu].head >= max_spu_buff)
spu_buff           71 arch/powerpc/oprofile/cell/spu_task_sync.c 			spu_buff[spu].head = 0;
spu_buff           97 arch/powerpc/oprofile/cell/spu_task_sync.c 		if (spu_buff[spu].buff == NULL)
spu_buff          106 arch/powerpc/oprofile/cell/spu_task_sync.c 		curr_head = spu_buff[spu].head;
spu_buff          112 arch/powerpc/oprofile/cell/spu_task_sync.c 		oprofile_put_buff(spu_buff[spu].buff,
spu_buff          113 arch/powerpc/oprofile/cell/spu_task_sync.c 				  spu_buff[spu].tail,
spu_buff          117 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].tail = curr_head;
spu_buff          407 arch/powerpc/oprofile/cell/spu_task_sync.c 	spu_buff[spu->number].ctx_sw_seen = 1;
spu_buff          466 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].head = 0;
spu_buff          467 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].tail = 0;
spu_buff          475 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].buff = kzalloc((max_spu_buff
spu_buff          479 arch/powerpc/oprofile/cell/spu_task_sync.c 		if (!spu_buff[spu].buff) {
spu_buff          487 arch/powerpc/oprofile/cell/spu_task_sync.c 				kfree(spu_buff[spu].buff);
spu_buff          488 arch/powerpc/oprofile/cell/spu_task_sync.c 				spu_buff[spu].buff = 0;
spu_buff          534 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].ctx_sw_seen = 0;
spu_buff          535 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[spu].last_guard_val = 0;
spu_buff          596 arch/powerpc/oprofile/cell/spu_task_sync.c 		if (grd_val && grd_val != spu_buff[spu_num].last_guard_val) {
spu_buff          597 arch/powerpc/oprofile/cell/spu_task_sync.c 			spu_buff[spu_num].last_guard_val = grd_val;
spu_buff          607 arch/powerpc/oprofile/cell/spu_task_sync.c 		if (spu_buff[spu_num].ctx_sw_seen)
spu_buff          645 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[k].ctx_sw_seen = 0;
spu_buff          651 arch/powerpc/oprofile/cell/spu_task_sync.c 		kfree(spu_buff[k].buff);
spu_buff          652 arch/powerpc/oprofile/cell/spu_task_sync.c 		spu_buff[k].buff = 0;