spr_val 304 arch/powerpc/include/asm/kvm_ppc.h int (*emulate_mtspr)(struct kvm_vcpu *vcpu, int sprn, ulong spr_val); spr_val 305 arch/powerpc/include/asm/kvm_ppc.h int (*emulate_mfspr)(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val); spr_val 23 arch/powerpc/kvm/book3s.h int sprn, ulong spr_val); spr_val 25 arch/powerpc/kvm/book3s.h int sprn, ulong *spr_val); spr_val 682 arch/powerpc/kvm/book3s_emulate.c int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) spr_val 690 arch/powerpc/kvm/book3s_emulate.c to_book3s(vcpu)->sdr1 = spr_val; spr_val 693 arch/powerpc/kvm/book3s_emulate.c kvmppc_set_dsisr(vcpu, spr_val); spr_val 696 arch/powerpc/kvm/book3s_emulate.c kvmppc_set_dar(vcpu, spr_val); spr_val 699 arch/powerpc/kvm/book3s_emulate.c to_book3s(vcpu)->hior = spr_val; spr_val 708 arch/powerpc/kvm/book3s_emulate.c kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val); spr_val 716 arch/powerpc/kvm/book3s_emulate.c to_book3s(vcpu)->hid[0] = spr_val; spr_val 719 arch/powerpc/kvm/book3s_emulate.c to_book3s(vcpu)->hid[1] = spr_val; spr_val 722 arch/powerpc/kvm/book3s_emulate.c to_book3s(vcpu)->hid[2] = spr_val; spr_val 725 arch/powerpc/kvm/book3s_emulate.c to_book3s(vcpu)->hid[2] = spr_val; spr_val 739 arch/powerpc/kvm/book3s_emulate.c } else if (spr_val & (1 << 29)) { /* HID2.PSE */ spr_val 750 arch/powerpc/kvm/book3s_emulate.c to_book3s(vcpu)->hid[4] = spr_val; spr_val 753 arch/powerpc/kvm/book3s_emulate.c to_book3s(vcpu)->hid[5] = spr_val; spr_val 767 arch/powerpc/kvm/book3s_emulate.c to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val; spr_val 771 arch/powerpc/kvm/book3s_emulate.c kvmppc_set_fscr(vcpu, spr_val); spr_val 774 arch/powerpc/kvm/book3s_emulate.c vcpu->arch.bescr = spr_val; spr_val 777 arch/powerpc/kvm/book3s_emulate.c vcpu->arch.ebbhr = spr_val; spr_val 780 arch/powerpc/kvm/book3s_emulate.c vcpu->arch.ebbrr = spr_val; spr_val 809 arch/powerpc/kvm/book3s_emulate.c mtspr(SPRN_TFHAR, spr_val); spr_val 811 arch/powerpc/kvm/book3s_emulate.c mtspr(SPRN_TEXASR, spr_val); spr_val 813 arch/powerpc/kvm/book3s_emulate.c mtspr(SPRN_TFIAR, spr_val); spr_val 865 arch/powerpc/kvm/book3s_emulate.c int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) spr_val 878 arch/powerpc/kvm/book3s_emulate.c *spr_val = bat->raw >> 32; spr_val 880 arch/powerpc/kvm/book3s_emulate.c *spr_val = bat->raw; spr_val 887 arch/powerpc/kvm/book3s_emulate.c *spr_val = to_book3s(vcpu)->sdr1; spr_val 890 arch/powerpc/kvm/book3s_emulate.c *spr_val = kvmppc_get_dsisr(vcpu); spr_val 893 arch/powerpc/kvm/book3s_emulate.c *spr_val = kvmppc_get_dar(vcpu); spr_val 896 arch/powerpc/kvm/book3s_emulate.c *spr_val = to_book3s(vcpu)->hior; spr_val 899 arch/powerpc/kvm/book3s_emulate.c *spr_val = to_book3s(vcpu)->hid[0]; spr_val 902 arch/powerpc/kvm/book3s_emulate.c *spr_val = to_book3s(vcpu)->hid[1]; spr_val 906 arch/powerpc/kvm/book3s_emulate.c *spr_val = to_book3s(vcpu)->hid[2]; spr_val 910 arch/powerpc/kvm/book3s_emulate.c *spr_val = to_book3s(vcpu)->hid[4]; spr_val 913 arch/powerpc/kvm/book3s_emulate.c *spr_val = to_book3s(vcpu)->hid[5]; spr_val 917 arch/powerpc/kvm/book3s_emulate.c *spr_val = 0; spr_val 923 arch/powerpc/kvm/book3s_emulate.c *spr_val = vcpu->arch.purr; spr_val 929 arch/powerpc/kvm/book3s_emulate.c *spr_val = vcpu->arch.spurr; spr_val 932 arch/powerpc/kvm/book3s_emulate.c *spr_val = to_book3s(vcpu)->vtb; spr_val 935 arch/powerpc/kvm/book3s_emulate.c *spr_val = vcpu->arch.ic; spr_val 945 arch/powerpc/kvm/book3s_emulate.c *spr_val = to_book3s(vcpu)->gqr[sprn - SPRN_GQR0]; spr_val 949 arch/powerpc/kvm/book3s_emulate.c *spr_val = vcpu->arch.fscr; spr_val 952 arch/powerpc/kvm/book3s_emulate.c *spr_val = vcpu->arch.bescr; spr_val 955 arch/powerpc/kvm/book3s_emulate.c *spr_val = vcpu->arch.ebbhr; spr_val 958 arch/powerpc/kvm/book3s_emulate.c *spr_val = vcpu->arch.ebbrr; spr_val 975 arch/powerpc/kvm/book3s_emulate.c *spr_val = mfspr(SPRN_TFHAR); spr_val 977 arch/powerpc/kvm/book3s_emulate.c *spr_val = mfspr(SPRN_TEXASR); spr_val 979 arch/powerpc/kvm/book3s_emulate.c *spr_val = mfspr(SPRN_TFIAR); spr_val 1008 arch/powerpc/kvm/book3s_emulate.c *spr_val = 0; spr_val 4974 arch/powerpc/kvm/book3s_hv.c ulong spr_val) spr_val 4980 arch/powerpc/kvm/book3s_hv.c ulong *spr_val) spr_val 75 arch/powerpc/kvm/booke.h int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val); spr_val 76 arch/powerpc/kvm/booke.h int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val); spr_val 102 arch/powerpc/kvm/booke.h ulong spr_val); spr_val 104 arch/powerpc/kvm/booke.h ulong *spr_val); spr_val 110 arch/powerpc/kvm/booke.h ulong spr_val); spr_val 112 arch/powerpc/kvm/booke.h ulong *spr_val); spr_val 120 arch/powerpc/kvm/booke_emulate.c int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) spr_val 127 arch/powerpc/kvm/booke_emulate.c vcpu->arch.shared->dar = spr_val; spr_val 130 arch/powerpc/kvm/booke_emulate.c vcpu->arch.shared->esr = spr_val; spr_val 133 arch/powerpc/kvm/booke_emulate.c vcpu->arch.csrr0 = spr_val; spr_val 136 arch/powerpc/kvm/booke_emulate.c vcpu->arch.csrr1 = spr_val; spr_val 139 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dsrr0 = spr_val; spr_val 142 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dsrr1 = spr_val; spr_val 153 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dbg_reg.iac1 = spr_val; spr_val 164 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dbg_reg.iac2 = spr_val; spr_val 176 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dbg_reg.iac3 = spr_val; spr_val 187 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dbg_reg.iac4 = spr_val; spr_val 199 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dbg_reg.dac1 = spr_val; spr_val 210 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dbg_reg.dac2 = spr_val; spr_val 221 arch/powerpc/kvm/booke_emulate.c spr_val &= (DBCR0_IDM | DBCR0_IC | DBCR0_BT | DBCR0_TIE | spr_val 225 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dbg_reg.dbcr0 = spr_val; spr_val 236 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dbg_reg.dbcr1 = spr_val; spr_val 247 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dbg_reg.dbcr2 = spr_val; spr_val 257 arch/powerpc/kvm/booke_emulate.c vcpu->arch.dbsr &= ~spr_val; spr_val 262 arch/powerpc/kvm/booke_emulate.c kvmppc_clr_tsr_bits(vcpu, spr_val); spr_val 270 arch/powerpc/kvm/booke_emulate.c spr_val &= ~TCR_WRC_MASK; spr_val 271 arch/powerpc/kvm/booke_emulate.c spr_val |= vcpu->arch.tcr & TCR_WRC_MASK; spr_val 273 arch/powerpc/kvm/booke_emulate.c kvmppc_set_tcr(vcpu, spr_val); spr_val 277 arch/powerpc/kvm/booke_emulate.c vcpu->arch.decar = spr_val; spr_val 285 arch/powerpc/kvm/booke_emulate.c kvmppc_set_sprg4(vcpu, spr_val); spr_val 288 arch/powerpc/kvm/booke_emulate.c kvmppc_set_sprg5(vcpu, spr_val); spr_val 291 arch/powerpc/kvm/booke_emulate.c kvmppc_set_sprg6(vcpu, spr_val); spr_val 294 arch/powerpc/kvm/booke_emulate.c kvmppc_set_sprg7(vcpu, spr_val); spr_val 298 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivpr = spr_val; spr_val 300 arch/powerpc/kvm/booke_emulate.c mtspr(SPRN_GIVPR, spr_val); spr_val 304 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = spr_val; spr_val 307 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = spr_val; spr_val 310 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = spr_val; spr_val 312 arch/powerpc/kvm/booke_emulate.c mtspr(SPRN_GIVOR2, spr_val); spr_val 316 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = spr_val; spr_val 319 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = spr_val; spr_val 322 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = spr_val; spr_val 325 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = spr_val; spr_val 328 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = spr_val; spr_val 331 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = spr_val; spr_val 333 arch/powerpc/kvm/booke_emulate.c mtspr(SPRN_GIVOR8, spr_val); spr_val 337 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = spr_val; spr_val 340 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = spr_val; spr_val 343 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = spr_val; spr_val 346 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = spr_val; spr_val 349 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = spr_val; spr_val 352 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = spr_val; spr_val 355 arch/powerpc/kvm/booke_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = spr_val; spr_val 358 arch/powerpc/kvm/booke_emulate.c vcpu->arch.mcsr &= ~spr_val; spr_val 362 arch/powerpc/kvm/booke_emulate.c kvmppc_set_epcr(vcpu, spr_val); spr_val 379 arch/powerpc/kvm/booke_emulate.c int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) spr_val 385 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivpr; spr_val 388 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.shared->dar; spr_val 391 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.shared->esr; spr_val 394 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.epr; spr_val 397 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.csrr0; spr_val 400 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.csrr1; spr_val 403 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dsrr0; spr_val 406 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dsrr1; spr_val 409 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dbg_reg.iac1; spr_val 412 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dbg_reg.iac2; spr_val 416 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dbg_reg.iac3; spr_val 419 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dbg_reg.iac4; spr_val 423 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dbg_reg.dac1; spr_val 426 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dbg_reg.dac2; spr_val 429 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dbg_reg.dbcr0; spr_val 431 arch/powerpc/kvm/booke_emulate.c *spr_val = *spr_val | DBCR0_EDM; spr_val 434 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dbg_reg.dbcr1; spr_val 437 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dbg_reg.dbcr2; spr_val 440 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.dbsr; spr_val 443 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.tsr; spr_val 446 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.tcr; spr_val 450 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; spr_val 453 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; spr_val 456 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; spr_val 459 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; spr_val 462 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; spr_val 465 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; spr_val 468 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; spr_val 471 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; spr_val 474 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; spr_val 477 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; spr_val 480 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; spr_val 483 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; spr_val 486 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; spr_val 489 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; spr_val 492 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; spr_val 495 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; spr_val 498 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.mcsr; spr_val 502 arch/powerpc/kvm/booke_emulate.c *spr_val = vcpu->arch.epcr; spr_val 205 arch/powerpc/kvm/e500_emulate.c int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) spr_val 213 arch/powerpc/kvm/e500_emulate.c kvmppc_set_pid(vcpu, spr_val); spr_val 216 arch/powerpc/kvm/e500_emulate.c if (spr_val != 0) spr_val 218 arch/powerpc/kvm/e500_emulate.c vcpu_e500->pid[1] = spr_val; spr_val 221 arch/powerpc/kvm/e500_emulate.c if (spr_val != 0) spr_val 223 arch/powerpc/kvm/e500_emulate.c vcpu_e500->pid[2] = spr_val; spr_val 226 arch/powerpc/kvm/e500_emulate.c vcpu->arch.shared->mas0 = spr_val; spr_val 229 arch/powerpc/kvm/e500_emulate.c vcpu->arch.shared->mas1 = spr_val; spr_val 232 arch/powerpc/kvm/e500_emulate.c vcpu->arch.shared->mas2 = spr_val; spr_val 236 arch/powerpc/kvm/e500_emulate.c vcpu->arch.shared->mas7_3 |= spr_val; spr_val 239 arch/powerpc/kvm/e500_emulate.c vcpu->arch.shared->mas4 = spr_val; spr_val 242 arch/powerpc/kvm/e500_emulate.c vcpu->arch.shared->mas6 = spr_val; spr_val 246 arch/powerpc/kvm/e500_emulate.c vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32; spr_val 250 arch/powerpc/kvm/e500_emulate.c vcpu_e500->l1csr0 = spr_val; spr_val 254 arch/powerpc/kvm/e500_emulate.c vcpu_e500->l1csr1 = spr_val; spr_val 258 arch/powerpc/kvm/e500_emulate.c vcpu_e500->hid0 = spr_val; spr_val 261 arch/powerpc/kvm/e500_emulate.c vcpu_e500->hid1 = spr_val; spr_val 266 arch/powerpc/kvm/e500_emulate.c spr_val); spr_val 274 arch/powerpc/kvm/e500_emulate.c vcpu->arch.pwrmgtcr0 = spr_val; spr_val 287 arch/powerpc/kvm/e500_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val; spr_val 290 arch/powerpc/kvm/e500_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val; spr_val 293 arch/powerpc/kvm/e500_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val; spr_val 298 arch/powerpc/kvm/e500_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL] = spr_val; spr_val 301 arch/powerpc/kvm/e500_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST] = spr_val; spr_val 305 arch/powerpc/kvm/e500_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val; spr_val 309 arch/powerpc/kvm/e500_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val; spr_val 312 arch/powerpc/kvm/e500_emulate.c vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val; spr_val 316 arch/powerpc/kvm/e500_emulate.c emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val); spr_val 322 arch/powerpc/kvm/e500_emulate.c int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) spr_val 330 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu_e500->pid[0]; spr_val 333 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu_e500->pid[1]; spr_val 336 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu_e500->pid[2]; spr_val 339 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.shared->mas0; spr_val 342 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.shared->mas1; spr_val 345 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.shared->mas2; spr_val 348 arch/powerpc/kvm/e500_emulate.c *spr_val = (u32)vcpu->arch.shared->mas7_3; spr_val 351 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.shared->mas4; spr_val 354 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.shared->mas6; spr_val 357 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.shared->mas7_3 >> 32; spr_val 361 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.decar; spr_val 364 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.tlbcfg[0]; spr_val 367 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.tlbcfg[1]; spr_val 372 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.tlbps[0]; spr_val 377 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.tlbps[1]; spr_val 380 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu_e500->l1csr0; spr_val 383 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu_e500->l1csr1; spr_val 386 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu_e500->hid0; spr_val 389 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu_e500->hid1; spr_val 392 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu_e500->svr; spr_val 396 arch/powerpc/kvm/e500_emulate.c *spr_val = 0; spr_val 400 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.mmucfg; spr_val 409 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.eptcfg; spr_val 413 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.pwrmgtcr0; spr_val 419 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]; spr_val 422 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]; spr_val 425 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]; spr_val 430 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL]; spr_val 433 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST]; spr_val 437 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]; spr_val 441 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL]; spr_val 444 arch/powerpc/kvm/e500_emulate.c *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT]; spr_val 448 arch/powerpc/kvm/e500_emulate.c emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val); spr_val 78 arch/powerpc/kvm/emulate.c ulong spr_val = kvmppc_get_gpr(vcpu, rs); spr_val 82 arch/powerpc/kvm/emulate.c kvmppc_set_srr0(vcpu, spr_val); spr_val 85 arch/powerpc/kvm/emulate.c kvmppc_set_srr1(vcpu, spr_val); spr_val 94 arch/powerpc/kvm/emulate.c vcpu->arch.dec = (u32) spr_val; spr_val 99 arch/powerpc/kvm/emulate.c kvmppc_set_sprg0(vcpu, spr_val); spr_val 102 arch/powerpc/kvm/emulate.c kvmppc_set_sprg1(vcpu, spr_val); spr_val 105 arch/powerpc/kvm/emulate.c kvmppc_set_sprg2(vcpu, spr_val); spr_val 108 arch/powerpc/kvm/emulate.c kvmppc_set_sprg3(vcpu, spr_val); spr_val 116 arch/powerpc/kvm/emulate.c spr_val); spr_val 131 arch/powerpc/kvm/emulate.c ulong spr_val = 0; spr_val 135 arch/powerpc/kvm/emulate.c spr_val = kvmppc_get_srr0(vcpu); spr_val 138 arch/powerpc/kvm/emulate.c spr_val = kvmppc_get_srr1(vcpu); spr_val 141 arch/powerpc/kvm/emulate.c spr_val = vcpu->arch.pvr; spr_val 144 arch/powerpc/kvm/emulate.c spr_val = vcpu->vcpu_id; spr_val 151 arch/powerpc/kvm/emulate.c spr_val = get_tb() >> 32; spr_val 154 arch/powerpc/kvm/emulate.c spr_val = get_tb(); spr_val 158 arch/powerpc/kvm/emulate.c spr_val = kvmppc_get_sprg0(vcpu); spr_val 161 arch/powerpc/kvm/emulate.c spr_val = kvmppc_get_sprg1(vcpu); spr_val 164 arch/powerpc/kvm/emulate.c spr_val = kvmppc_get_sprg2(vcpu); spr_val 167 arch/powerpc/kvm/emulate.c spr_val = kvmppc_get_sprg3(vcpu); spr_val 173 arch/powerpc/kvm/emulate.c spr_val = kvmppc_get_dec(vcpu, get_tb()); spr_val 177 arch/powerpc/kvm/emulate.c &spr_val); spr_val 186 arch/powerpc/kvm/emulate.c kvmppc_set_gpr(vcpu, rt, spr_val); spr_val 831 drivers/gpu/drm/i915/i915_drv.h u32 spr_val; spr_val 2731 drivers/gpu/drm/i915/intel_pm.c result->spr_val <= max->spr && spr_val 2745 drivers/gpu/drm/i915/intel_pm.c if (result->spr_val > max->spr) spr_val 2747 drivers/gpu/drm/i915/intel_pm.c level, result->spr_val, max->spr); spr_val 2753 drivers/gpu/drm/i915/intel_pm.c result->spr_val = min_t(u32, result->spr_val, max->spr); spr_val 2788 drivers/gpu/drm/i915/intel_pm.c result->spr_val = ilk_compute_spr_wm(crtc_state, sprstate, spr_latency); spr_val 3228 drivers/gpu/drm/i915/intel_pm.c a_wm->spr_val = max(a_wm->spr_val, b_wm->spr_val); spr_val 3279 drivers/gpu/drm/i915/intel_pm.c ret_wm->spr_val = max(ret_wm->spr_val, wm->spr_val); spr_val 3401 drivers/gpu/drm/i915/intel_pm.c if (INTEL_GEN(dev_priv) <= 6 && r->spr_val) { spr_val 3403 drivers/gpu/drm/i915/intel_pm.c results->wm_lp_spr[wm_lp - 1] = WM1S_LP_EN | r->spr_val; spr_val 3405 drivers/gpu/drm/i915/intel_pm.c results->wm_lp_spr[wm_lp - 1] = r->spr_val; spr_val 3421 drivers/gpu/drm/i915/intel_pm.c (r->spr_val << WM0_PIPE_SPRITE_SHIFT) | spr_val 5861 drivers/gpu/drm/i915/intel_pm.c active->wm[0].spr_val = (tmp & WM0_PIPE_SPRITE_MASK) >> WM0_PIPE_SPRITE_SHIFT;