splane 39 drivers/gpu/drm/shmobile/shmob_drm_plane.c static void shmob_drm_plane_compute_base(struct shmob_drm_plane *splane, splane 46 drivers/gpu/drm/shmobile/shmob_drm_plane.c bpp = splane->format->yuv ? 8 : splane->format->bpp; splane 48 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->dma[0] = gem->paddr + fb->offsets[0] splane 51 drivers/gpu/drm/shmobile/shmob_drm_plane.c if (splane->format->yuv) { splane 52 drivers/gpu/drm/shmobile/shmob_drm_plane.c bpp = splane->format->bpp - 8; splane 54 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->dma[1] = gem->paddr + fb->offsets[1] splane 60 drivers/gpu/drm/shmobile/shmob_drm_plane.c static void __shmob_drm_plane_setup(struct shmob_drm_plane *splane, splane 63 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct shmob_drm_device *sdev = splane->plane.dev->dev_private; splane 67 drivers/gpu/drm/shmobile/shmob_drm_plane.c format = LDBBSIFR_EN | (splane->alpha << LDBBSIFR_LAY_SHIFT); splane 69 drivers/gpu/drm/shmobile/shmob_drm_plane.c switch (splane->format->fourcc) { splane 88 drivers/gpu/drm/shmobile/shmob_drm_plane.c switch (splane->format->fourcc) { splane 112 drivers/gpu/drm/shmobile/shmob_drm_plane.c #define plane_reg_dump(sdev, splane, reg) \ splane 114 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->index, #reg, \ splane 115 drivers/gpu/drm/shmobile/shmob_drm_plane.c lcdc_read(sdev, reg(splane->index)), \ splane 116 drivers/gpu/drm/shmobile/shmob_drm_plane.c lcdc_read(sdev, reg(splane->index) + LCDC_SIDE_B_OFFSET)) splane 118 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBSIFR); splane 119 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBSSZR); splane 120 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBLOCR); splane 121 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBSMWR); splane 122 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBSAYR); splane 123 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBSACR); splane 125 drivers/gpu/drm/shmobile/shmob_drm_plane.c lcdc_write(sdev, LDBCR, LDBCR_UPC(splane->index)); splane 126 drivers/gpu/drm/shmobile/shmob_drm_plane.c dev_dbg(sdev->ddev->dev, "%s(%u): %s 0x%08x\n", __func__, splane->index, splane 129 drivers/gpu/drm/shmobile/shmob_drm_plane.c lcdc_write(sdev, LDBnBSIFR(splane->index), format); splane 131 drivers/gpu/drm/shmobile/shmob_drm_plane.c lcdc_write(sdev, LDBnBSSZR(splane->index), splane 132 drivers/gpu/drm/shmobile/shmob_drm_plane.c (splane->crtc_h << LDBBSSZR_BVSS_SHIFT) | splane 133 drivers/gpu/drm/shmobile/shmob_drm_plane.c (splane->crtc_w << LDBBSSZR_BHSS_SHIFT)); splane 134 drivers/gpu/drm/shmobile/shmob_drm_plane.c lcdc_write(sdev, LDBnBLOCR(splane->index), splane 135 drivers/gpu/drm/shmobile/shmob_drm_plane.c (splane->crtc_y << LDBBLOCR_CVLC_SHIFT) | splane 136 drivers/gpu/drm/shmobile/shmob_drm_plane.c (splane->crtc_x << LDBBLOCR_CHLC_SHIFT)); splane 137 drivers/gpu/drm/shmobile/shmob_drm_plane.c lcdc_write(sdev, LDBnBSMWR(splane->index), splane 140 drivers/gpu/drm/shmobile/shmob_drm_plane.c shmob_drm_plane_compute_base(splane, fb, splane->src_x, splane->src_y); splane 142 drivers/gpu/drm/shmobile/shmob_drm_plane.c lcdc_write(sdev, LDBnBSAYR(splane->index), splane->dma[0]); splane 143 drivers/gpu/drm/shmobile/shmob_drm_plane.c if (splane->format->yuv) splane 144 drivers/gpu/drm/shmobile/shmob_drm_plane.c lcdc_write(sdev, LDBnBSACR(splane->index), splane->dma[1]); splane 147 drivers/gpu/drm/shmobile/shmob_drm_plane.c LDBCR_UPF(splane->index) | LDBCR_UPD(splane->index)); splane 148 drivers/gpu/drm/shmobile/shmob_drm_plane.c dev_dbg(sdev->ddev->dev, "%s(%u): %s 0x%08x\n", __func__, splane->index, splane 151 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBSIFR); splane 152 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBSSZR); splane 153 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBLOCR); splane 154 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBSMWR); splane 155 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBSAYR); splane 156 drivers/gpu/drm/shmobile/shmob_drm_plane.c plane_reg_dump(sdev, splane, LDBnBSACR); splane 161 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct shmob_drm_plane *splane = to_shmob_plane(plane); splane 166 drivers/gpu/drm/shmobile/shmob_drm_plane.c __shmob_drm_plane_setup(splane, plane->fb); splane 177 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct shmob_drm_plane *splane = to_shmob_plane(plane); splane 193 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->format = format; splane 195 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->src_x = src_x >> 16; splane 196 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->src_y = src_y >> 16; splane 197 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->crtc_x = crtc_x; splane 198 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->crtc_y = crtc_y; splane 199 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->crtc_w = crtc_w; splane 200 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->crtc_h = crtc_h; splane 202 drivers/gpu/drm/shmobile/shmob_drm_plane.c __shmob_drm_plane_setup(splane, fb); splane 209 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct shmob_drm_plane *splane = to_shmob_plane(plane); splane 212 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->format = NULL; splane 214 drivers/gpu/drm/shmobile/shmob_drm_plane.c lcdc_write(sdev, LDBnBSIFR(splane->index), 0); splane 244 drivers/gpu/drm/shmobile/shmob_drm_plane.c struct shmob_drm_plane *splane; splane 247 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane = devm_kzalloc(sdev->dev, sizeof(*splane), GFP_KERNEL); splane 248 drivers/gpu/drm/shmobile/shmob_drm_plane.c if (splane == NULL) splane 251 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->index = index; splane 252 drivers/gpu/drm/shmobile/shmob_drm_plane.c splane->alpha = 255; splane 254 drivers/gpu/drm/shmobile/shmob_drm_plane.c ret = drm_plane_init(sdev->ddev, &splane->plane, 1,