spill             100 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r16]=r8,16;								\
spill             101 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r17]=r9,16;								\
spill             103 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r16]=r10,24;							\
spill             104 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r17]=r11,24;							\
spill             130 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r16]=r20,16;	/* save original r1 */				\
spill             131 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r17]=r12,16;							\
spill             134 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r16]=r13,16;							\
spill             135 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r17]=r21,16;	/* save ar.fpsr */				\
spill             138 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r16]=r15,16;							\
spill             139 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r17]=r14,16;							\
spill             141 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r16]=r2,16;								\
spill             142 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r17]=r3,16;								\
spill             168 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r2]=r16,16;		\
spill             169 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r3]=r17,16;		\
spill             171 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r2]=r18,16;		\
spill             172 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r3]=r19,16;		\
spill             174 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r2]=r20,16;		\
spill             175 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r3]=r21,16;		\
spill             178 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r2]=r22,16;		\
spill             179 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r3]=r23,16;		\
spill             182 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r2]=r24,16;		\
spill             183 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r3]=r25,16;		\
spill             185 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r2]=r26,16;		\
spill             186 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r3]=r27,16;		\
spill             188 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r2]=r28,16;		\
spill             189 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r3]=r29,16;		\
spill             191 arch/ia64/kernel/minstate.h .mem.offset 0,0; st8.spill [r2]=r30,16;		\
spill             192 arch/ia64/kernel/minstate.h .mem.offset 8,0; st8.spill [r3]=r31,32;		\
spill             198 arch/ia64/kernel/minstate.h 	stf.spill [r2]=f6,32;			\
spill             199 arch/ia64/kernel/minstate.h 	stf.spill [r3]=f7,32;			\
spill             201 arch/ia64/kernel/minstate.h 	stf.spill [r2]=f8,32;			\
spill             202 arch/ia64/kernel/minstate.h 	stf.spill [r3]=f9,32;			\
spill             204 arch/ia64/kernel/minstate.h 	stf.spill [r2]=f10;			\
spill             205 arch/ia64/kernel/minstate.h 	stf.spill [r3]=f11;			\
spill             104 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 	unsigned int spill = SPILL(dst, _type);				\
spill             107 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 	if (spill && spill == SPILL(src, _type) &&			\
spill             108 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 	    sizeof(_type) - spill <= size) {				\
spill             109 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		spill = sizeof(_type) - spill;				\
spill             110 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		diff_offs = vmw_find_first_diff_u8(dst, src, spill);	\
spill             111 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		if (diff_offs < spill)					\
spill             114 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		dst += spill;						\
spill             115 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		src += spill;						\
spill             116 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		size -= spill;						\
spill             117 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		offset += spill;					\
spill             118 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		spill = 0;						\
spill             120 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 	if (!spill && !SPILL(src, _type)) {				\
spill             177 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 	unsigned int spill = SPILL(dst, _type);				\
spill             181 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 	if (spill && spill <= size && spill == SPILL(src, _type)) {	\
spill             182 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		diff_offs = vmw_find_last_diff_u8(dst, src, spill);	\
spill             184 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 			location = size - spill + diff_offs - 1;	\
spill             188 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		dst -= spill;						\
spill             189 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		src -= spill;						\
spill             190 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		size -= spill;						\
spill             191 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 		spill = 0;						\
spill             193 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c 	if (!spill && !SPILL(src, _type)) {				\
spill             381 drivers/staging/netlogic/xlr_net.c 	void *spill;
spill             388 drivers/staging/netlogic/xlr_net.c 	spill = kmalloc(spill_size + SMP_CACHE_BYTES, GFP_KERNEL);
spill             389 drivers/staging/netlogic/xlr_net.c 	if (!spill)
spill             392 drivers/staging/netlogic/xlr_net.c 	spill = PTR_ALIGN(spill, SMP_CACHE_BYTES);
spill             393 drivers/staging/netlogic/xlr_net.c 	phys_addr = virt_to_phys(spill);
spill             400 drivers/staging/netlogic/xlr_net.c 	return spill;