speed_cntl       1388 drivers/gpu/drm/amd/amdgpu/cik.c 	u32 speed_cntl, current_data_rate;
speed_cntl       1405 drivers/gpu/drm/amd/amdgpu/cik.c 	speed_cntl = RREG32_PCIE(ixPCIE_LC_SPEED_CNTL);
speed_cntl       1406 drivers/gpu/drm/amd/amdgpu/cik.c 	current_data_rate = (speed_cntl & PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK) >>
speed_cntl       1518 drivers/gpu/drm/amd/amdgpu/cik.c 	speed_cntl |= PCIE_LC_SPEED_CNTL__LC_FORCE_EN_SW_SPEED_CHANGE_MASK |
speed_cntl       1520 drivers/gpu/drm/amd/amdgpu/cik.c 	speed_cntl &= ~PCIE_LC_SPEED_CNTL__LC_FORCE_DIS_SW_SPEED_CHANGE_MASK;
speed_cntl       1521 drivers/gpu/drm/amd/amdgpu/cik.c 	WREG32_PCIE(ixPCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       1533 drivers/gpu/drm/amd/amdgpu/cik.c 	speed_cntl = RREG32_PCIE(ixPCIE_LC_SPEED_CNTL);
speed_cntl       1534 drivers/gpu/drm/amd/amdgpu/cik.c 	speed_cntl |= PCIE_LC_SPEED_CNTL__LC_INITIATE_LINK_SPEED_CHANGE_MASK;
speed_cntl       1535 drivers/gpu/drm/amd/amdgpu/cik.c 	WREG32_PCIE(ixPCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       1538 drivers/gpu/drm/amd/amdgpu/cik.c 		speed_cntl = RREG32_PCIE(ixPCIE_LC_SPEED_CNTL);
speed_cntl       1539 drivers/gpu/drm/amd/amdgpu/cik.c 		if ((speed_cntl & PCIE_LC_SPEED_CNTL__LC_INITIATE_LINK_SPEED_CHANGE_MASK) == 0)
speed_cntl       1637 drivers/gpu/drm/amd/amdgpu/si.c 	u32 speed_cntl, current_data_rate;
speed_cntl       1654 drivers/gpu/drm/amd/amdgpu/si.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       1655 drivers/gpu/drm/amd/amdgpu/si.c 	current_data_rate = (speed_cntl & LC_CURRENT_DATA_RATE_MASK) >>
speed_cntl       1756 drivers/gpu/drm/amd/amdgpu/si.c 	speed_cntl |= LC_FORCE_EN_SW_SPEED_CHANGE | LC_FORCE_DIS_HW_SPEED_CHANGE;
speed_cntl       1757 drivers/gpu/drm/amd/amdgpu/si.c 	speed_cntl &= ~LC_FORCE_DIS_SW_SPEED_CHANGE;
speed_cntl       1758 drivers/gpu/drm/amd/amdgpu/si.c 	WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       1770 drivers/gpu/drm/amd/amdgpu/si.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       1771 drivers/gpu/drm/amd/amdgpu/si.c 	speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE;
speed_cntl       1772 drivers/gpu/drm/amd/amdgpu/si.c 	WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       1775 drivers/gpu/drm/amd/amdgpu/si.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       1776 drivers/gpu/drm/amd/amdgpu/si.c 		if ((speed_cntl & LC_INITIATE_LINK_SPEED_CHANGE) == 0)
speed_cntl       6188 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32 speed_cntl;
speed_cntl       6190 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL) & LC_CURRENT_DATA_RATE_MASK;
speed_cntl       6191 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	speed_cntl >>= LC_CURRENT_DATA_RATE_SHIFT;
speed_cntl       6193 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	return (u16)speed_cntl;
speed_cntl       4815 drivers/gpu/drm/radeon/ci_dpm.c 	u32 speed_cntl = 0;
speed_cntl       4817 drivers/gpu/drm/radeon/ci_dpm.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL) & LC_CURRENT_DATA_RATE_MASK;
speed_cntl       4818 drivers/gpu/drm/radeon/ci_dpm.c 	speed_cntl >>= LC_CURRENT_DATA_RATE_SHIFT;
speed_cntl       4820 drivers/gpu/drm/radeon/ci_dpm.c 	return (u16)speed_cntl;
speed_cntl       9508 drivers/gpu/drm/radeon/cik.c 	u32 speed_cntl, current_data_rate;
speed_cntl       9532 drivers/gpu/drm/radeon/cik.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       9533 drivers/gpu/drm/radeon/cik.c 	current_data_rate = (speed_cntl & LC_CURRENT_DATA_RATE_MASK) >>
speed_cntl       9639 drivers/gpu/drm/radeon/cik.c 	speed_cntl |= LC_FORCE_EN_SW_SPEED_CHANGE | LC_FORCE_DIS_HW_SPEED_CHANGE;
speed_cntl       9640 drivers/gpu/drm/radeon/cik.c 	speed_cntl &= ~LC_FORCE_DIS_SW_SPEED_CHANGE;
speed_cntl       9641 drivers/gpu/drm/radeon/cik.c 	WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       9653 drivers/gpu/drm/radeon/cik.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       9654 drivers/gpu/drm/radeon/cik.c 	speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE;
speed_cntl       9655 drivers/gpu/drm/radeon/cik.c 	WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       9658 drivers/gpu/drm/radeon/cik.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       9659 drivers/gpu/drm/radeon/cik.c 		if ((speed_cntl & LC_INITIATE_LINK_SPEED_CHANGE) == 0)
speed_cntl       5327 drivers/gpu/drm/radeon/evergreen.c 	u32 link_width_cntl, speed_cntl;
speed_cntl       5346 drivers/gpu/drm/radeon/evergreen.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       5347 drivers/gpu/drm/radeon/evergreen.c 	if (speed_cntl & LC_CURRENT_DATA_RATE) {
speed_cntl       5354 drivers/gpu/drm/radeon/evergreen.c 	if ((speed_cntl & LC_OTHER_SIDE_EVER_SENT_GEN2) ||
speed_cntl       5355 drivers/gpu/drm/radeon/evergreen.c 	    (speed_cntl & LC_OTHER_SIDE_SUPPORTS_GEN2)) {
speed_cntl       5361 drivers/gpu/drm/radeon/evergreen.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       5362 drivers/gpu/drm/radeon/evergreen.c 		speed_cntl &= ~LC_TARGET_LINK_SPEED_OVERRIDE_EN;
speed_cntl       5363 drivers/gpu/drm/radeon/evergreen.c 		WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       5365 drivers/gpu/drm/radeon/evergreen.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       5366 drivers/gpu/drm/radeon/evergreen.c 		speed_cntl |= LC_CLR_FAILED_SPD_CHANGE_CNT;
speed_cntl       5367 drivers/gpu/drm/radeon/evergreen.c 		WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       5369 drivers/gpu/drm/radeon/evergreen.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       5370 drivers/gpu/drm/radeon/evergreen.c 		speed_cntl &= ~LC_CLR_FAILED_SPD_CHANGE_CNT;
speed_cntl       5371 drivers/gpu/drm/radeon/evergreen.c 		WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       5373 drivers/gpu/drm/radeon/evergreen.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       5374 drivers/gpu/drm/radeon/evergreen.c 		speed_cntl |= LC_GEN2_EN_STRAP;
speed_cntl       5375 drivers/gpu/drm/radeon/evergreen.c 		WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       4493 drivers/gpu/drm/radeon/r600.c 	u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp;
speed_cntl       4517 drivers/gpu/drm/radeon/r600.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       4518 drivers/gpu/drm/radeon/r600.c 	if (speed_cntl & LC_CURRENT_DATA_RATE) {
speed_cntl       4546 drivers/gpu/drm/radeon/r600.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       4547 drivers/gpu/drm/radeon/r600.c 	if ((speed_cntl & LC_OTHER_SIDE_EVER_SENT_GEN2) &&
speed_cntl       4548 drivers/gpu/drm/radeon/r600.c 	    (speed_cntl & LC_OTHER_SIDE_SUPPORTS_GEN2)) {
speed_cntl       4562 drivers/gpu/drm/radeon/r600.c 		speed_cntl &= ~LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_MASK;
speed_cntl       4563 drivers/gpu/drm/radeon/r600.c 		speed_cntl |= (0x3 << LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_SHIFT);
speed_cntl       4564 drivers/gpu/drm/radeon/r600.c 		speed_cntl &= ~LC_VOLTAGE_TIMER_SEL_MASK;
speed_cntl       4565 drivers/gpu/drm/radeon/r600.c 		speed_cntl &= ~LC_FORCE_DIS_HW_SPEED_CHANGE;
speed_cntl       4566 drivers/gpu/drm/radeon/r600.c 		speed_cntl |= LC_FORCE_EN_HW_SPEED_CHANGE;
speed_cntl       4567 drivers/gpu/drm/radeon/r600.c 		WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       4585 drivers/gpu/drm/radeon/r600.c 			speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       4586 drivers/gpu/drm/radeon/r600.c 			speed_cntl &= ~LC_TARGET_LINK_SPEED_OVERRIDE_EN;
speed_cntl       4587 drivers/gpu/drm/radeon/r600.c 			WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       4590 drivers/gpu/drm/radeon/r600.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       4591 drivers/gpu/drm/radeon/r600.c 		speed_cntl |= LC_GEN2_EN_STRAP;
speed_cntl       4592 drivers/gpu/drm/radeon/r600.c 		WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       2027 drivers/gpu/drm/radeon/rv770.c 	u32 link_width_cntl, lanes, speed_cntl, tmp;
speed_cntl       2066 drivers/gpu/drm/radeon/rv770.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       2067 drivers/gpu/drm/radeon/rv770.c 	if ((speed_cntl & LC_OTHER_SIDE_EVER_SENT_GEN2) &&
speed_cntl       2068 drivers/gpu/drm/radeon/rv770.c 	    (speed_cntl & LC_OTHER_SIDE_SUPPORTS_GEN2)) {
speed_cntl       2079 drivers/gpu/drm/radeon/rv770.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       2080 drivers/gpu/drm/radeon/rv770.c 		speed_cntl &= ~LC_TARGET_LINK_SPEED_OVERRIDE_EN;
speed_cntl       2081 drivers/gpu/drm/radeon/rv770.c 		WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       2083 drivers/gpu/drm/radeon/rv770.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       2084 drivers/gpu/drm/radeon/rv770.c 		speed_cntl |= LC_CLR_FAILED_SPD_CHANGE_CNT;
speed_cntl       2085 drivers/gpu/drm/radeon/rv770.c 		WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       2087 drivers/gpu/drm/radeon/rv770.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       2088 drivers/gpu/drm/radeon/rv770.c 		speed_cntl &= ~LC_CLR_FAILED_SPD_CHANGE_CNT;
speed_cntl       2089 drivers/gpu/drm/radeon/rv770.c 		WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       2091 drivers/gpu/drm/radeon/rv770.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       2092 drivers/gpu/drm/radeon/rv770.c 		speed_cntl |= LC_GEN2_EN_STRAP;
speed_cntl       2093 drivers/gpu/drm/radeon/rv770.c 		WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       7091 drivers/gpu/drm/radeon/si.c 	u32 speed_cntl, current_data_rate;
speed_cntl       7115 drivers/gpu/drm/radeon/si.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       7116 drivers/gpu/drm/radeon/si.c 	current_data_rate = (speed_cntl & LC_CURRENT_DATA_RATE_MASK) >>
speed_cntl       7222 drivers/gpu/drm/radeon/si.c 	speed_cntl |= LC_FORCE_EN_SW_SPEED_CHANGE | LC_FORCE_DIS_HW_SPEED_CHANGE;
speed_cntl       7223 drivers/gpu/drm/radeon/si.c 	speed_cntl &= ~LC_FORCE_DIS_SW_SPEED_CHANGE;
speed_cntl       7224 drivers/gpu/drm/radeon/si.c 	WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       7236 drivers/gpu/drm/radeon/si.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       7237 drivers/gpu/drm/radeon/si.c 	speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE;
speed_cntl       7238 drivers/gpu/drm/radeon/si.c 	WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
speed_cntl       7241 drivers/gpu/drm/radeon/si.c 		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
speed_cntl       7242 drivers/gpu/drm/radeon/si.c 		if ((speed_cntl & LC_INITIATE_LINK_SPEED_CHANGE) == 0)
speed_cntl       5736 drivers/gpu/drm/radeon/si_dpm.c 	u32 speed_cntl;
speed_cntl       5738 drivers/gpu/drm/radeon/si_dpm.c 	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL) & LC_CURRENT_DATA_RATE_MASK;
speed_cntl       5739 drivers/gpu/drm/radeon/si_dpm.c 	speed_cntl >>= LC_CURRENT_DATA_RATE_SHIFT;
speed_cntl       5741 drivers/gpu/drm/radeon/si_dpm.c 	return (u16)speed_cntl;