spec_pupd 204 drivers/pinctrl/mediatek/pinctrl-mt8135.c static const struct mtk_spec_pull_set spec_pupd[] = { spec_pupd 241 drivers/pinctrl/mediatek/pinctrl-mt8135.c for (i = 0; i < ARRAY_SIZE(spec_pupd); i++) { spec_pupd 242 drivers/pinctrl/mediatek/pinctrl-mt8135.c if (pin == spec_pupd[i].pin) { spec_pupd 252 drivers/pinctrl/mediatek/pinctrl-mt8135.c reg_pupd = spec_pupd[i].pupd_offset + align; spec_pupd 254 drivers/pinctrl/mediatek/pinctrl-mt8135.c reg_pupd = spec_pupd[i].pupd_offset + (align << 1); spec_pupd 256 drivers/pinctrl/mediatek/pinctrl-mt8135.c regmap_write(regmap, reg_pupd, spec_pupd[i].pupd_bit); spec_pupd 258 drivers/pinctrl/mediatek/pinctrl-mt8135.c reg_set_r0 = spec_pupd[i].r0_offset + align; spec_pupd 259 drivers/pinctrl/mediatek/pinctrl-mt8135.c reg_rst_r0 = spec_pupd[i].r0_offset + (align << 1); spec_pupd 260 drivers/pinctrl/mediatek/pinctrl-mt8135.c reg_set_r1 = spec_pupd[i].r1_offset + align; spec_pupd 261 drivers/pinctrl/mediatek/pinctrl-mt8135.c reg_rst_r1 = spec_pupd[i].r1_offset + (align << 1); spec_pupd 265 drivers/pinctrl/mediatek/pinctrl-mt8135.c regmap_write(regmap, reg_rst_r0, spec_pupd[i].r0_bit); spec_pupd 266 drivers/pinctrl/mediatek/pinctrl-mt8135.c regmap_write(regmap, reg_rst_r1, spec_pupd[i].r1_bit); spec_pupd 269 drivers/pinctrl/mediatek/pinctrl-mt8135.c regmap_write(regmap, reg_set_r0, spec_pupd[i].r0_bit); spec_pupd 270 drivers/pinctrl/mediatek/pinctrl-mt8135.c regmap_write(regmap, reg_rst_r1, spec_pupd[i].r1_bit); spec_pupd 273 drivers/pinctrl/mediatek/pinctrl-mt8135.c regmap_write(regmap, reg_rst_r0, spec_pupd[i].r0_bit); spec_pupd 274 drivers/pinctrl/mediatek/pinctrl-mt8135.c regmap_write(regmap, reg_set_r1, spec_pupd[i].r1_bit); spec_pupd 277 drivers/pinctrl/mediatek/pinctrl-mt8135.c regmap_write(regmap, reg_set_r0, spec_pupd[i].r0_bit); spec_pupd 278 drivers/pinctrl/mediatek/pinctrl-mt8135.c regmap_write(regmap, reg_set_r1, spec_pupd[i].r1_bit);