source_view_width  325 drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c 	fbc_pitch = align_to_chunks_number_per_line(params->source_view_width);
source_view_width 1866 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		params.source_view_width = pipe_ctx->stream->timing.h_addressable;
source_view_width  273 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	uint32_t source_view_width,
source_view_width  278 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		((source_view_width * source_view_height) >
source_view_width  377 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 			params->source_view_width,
source_view_width  387 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 			(params->source_view_width *
source_view_width  521 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		params->source_view_width);
source_view_width  663 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	uint32_t source_view_width;
source_view_width  705 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 	source_view_width =
source_view_width  708 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 			params->source_view_width);
source_view_width  712 drivers/gpu/drm/amd/display/dc/dce112/dce112_compressor.c 		rows_per_channel = source_view_width * source_view_height * 4;
source_view_width   51 drivers/gpu/drm/amd/display/dc/inc/compressor.h 	uint32_t source_view_width;
source_view_width  116 drivers/gpu/drm/amd/display/dc/inc/compressor.h 	unsigned int   source_view_width;