source_surface_mode  140 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if ((v->source_surface_mode[k] == dcn_bw_sw_linear && v->source_scan[k] != dcn_bw_hor) || ((v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x || v->source_surface_mode[k] == dcn_bw_sw_var_d || v->source_surface_mode[k] == dcn_bw_sw_var_d_x) && v->source_pixel_format[k] != dcn_bw_rgb_sub_64)) {
source_surface_mode  180 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->pte_enable == dcn_bw_yes && v->source_scan[k] != dcn_bw_hor && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x)) {
source_surface_mode  183 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		else if (v->pte_enable == dcn_bw_yes && v->source_scan[k] == dcn_bw_hor && (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 || v->source_pixel_format[k] == dcn_bw_rgb_sub_32) && (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x)) {
source_surface_mode  345 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode  359 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode  383 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear || (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_var_s || v->source_surface_mode[k] == dcn_bw_sw_var_s_x) && v->source_scan[k] == dcn_bw_hor)) {
source_surface_mode  392 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode  419 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode  641 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode  645 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) {
source_surface_mode  649 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					else if (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x) {
source_surface_mode  664 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 					if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode  701 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode  705 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) {
source_surface_mode  709 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						else if (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x) {
source_surface_mode  725 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 						if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode 1062 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode 1076 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode 1100 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear || (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_var_s || v->source_surface_mode[k] == dcn_bw_sw_var_s_x) && v->source_scan[k] == dcn_bw_hor)) {
source_surface_mode 1109 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode 1445 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode 1457 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode 1492 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode 1496 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) {
source_surface_mode 1500 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			else if (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x) {
source_surface_mode 1515 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode 1551 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode 1555 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				else if (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x) {
source_surface_mode 1559 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				else if (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x) {
source_surface_mode 1574 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
source_surface_mode  890 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			v->source_surface_mode[input_idx] = dcn_bw_sw_4_kb_s;
source_surface_mode  981 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			v->source_surface_mode[input_idx] = tl_sw_mode_to_bw_defs(
source_surface_mode  187 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	enum dcn_bw_defs source_surface_mode[number_of_planes_minus_one + 1];