sohandle 59 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c static unsigned long read_reg(void *sohandle, sohandle 62 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c return so->read_data(sohandle); sohandle 65 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c static void write_reg(void *sohandle, sohandle 70 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c so->write_data(sohandle, v); /* PTH4/LCDRS High [param, 17:0] */ sohandle 72 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c so->write_index(sohandle, v); /* PTH4/LCDRS Low [cmd, 7:0] */ sohandle 75 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c static void write_data(void *sohandle, sohandle 82 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, data[i]); sohandle 85 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c static unsigned long read_device_code(void *sohandle, sohandle 91 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xb0); sohandle 92 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 95 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xb1); sohandle 96 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 99 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xbf); sohandle 103 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c read_reg(sohandle, so); sohandle 106 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c device_code = ((read_reg(sohandle, so) & 0xff) << 24); sohandle 107 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c device_code |= ((read_reg(sohandle, so) & 0xff) << 16); sohandle 108 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c device_code |= ((read_reg(sohandle, so) & 0xff) << 8); sohandle 109 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c device_code |= (read_reg(sohandle, so) & 0xff); sohandle 114 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c static void write_memory_start(void *sohandle, sohandle 117 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0x2c); sohandle 120 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c static void clear_memory(void *sohandle, sohandle 126 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_memory_start(sohandle, so); sohandle 130 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 133 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c static void display_on(void *sohandle, sohandle 137 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xb0); sohandle 138 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 141 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xb1); sohandle 142 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 145 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xb3); sohandle 146 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_data(sohandle, so, data_frame_if, ARRAY_SIZE(data_frame_if)); sohandle 149 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xb4); sohandle 150 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); /* DBI, internal clock */ sohandle 153 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xc0); sohandle 154 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_data(sohandle, so, data_panel, ARRAY_SIZE(data_panel)); sohandle 157 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xc1); sohandle 158 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing)); sohandle 161 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xc2); sohandle 162 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing)); sohandle 165 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xc3); sohandle 166 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing)); sohandle 169 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xc4); sohandle 170 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_data(sohandle, so, data_timing_src, ARRAY_SIZE(data_timing_src)); sohandle 173 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xc8); sohandle 174 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma)); sohandle 177 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xc9); sohandle 178 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma)); sohandle 181 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xca); sohandle 182 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma)); sohandle 185 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xd0); sohandle 186 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_data(sohandle, so, data_power, ARRAY_SIZE(data_power)); sohandle 189 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xd1); sohandle 190 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 191 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x0f); sohandle 192 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x02); sohandle 195 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xd2); sohandle 196 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x63); sohandle 197 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x24); sohandle 200 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xd3); sohandle 201 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x63); sohandle 202 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x24); sohandle 205 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xd4); sohandle 206 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x63); sohandle 207 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x24); sohandle 209 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0xd8); sohandle 210 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x77); sohandle 211 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x77); sohandle 214 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0x35); sohandle 215 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 218 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0x44); sohandle 219 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 220 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 223 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0x2a); sohandle 224 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 225 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 226 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 227 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0xef); sohandle 230 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0x2b); sohandle 231 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 232 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x00); sohandle 233 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x01); sohandle 234 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 1, 0x8f); sohandle 237 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0x11); sohandle 242 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c clear_memory(sohandle, so); sohandle 245 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_reg(sohandle, so, 0, 0x29); sohandle 248 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_memory_start(sohandle, so); sohandle 251 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c int kfr2r09_lcd_setup(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so) sohandle 263 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c if (read_device_code(sohandle, so) != 0x01221517) sohandle 268 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c display_on(sohandle, so); sohandle 272 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c void kfr2r09_lcd_start(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so) sohandle 274 arch/sh/boards/mach-kfr2r09/lcd_wqvga.c write_memory_start(sohandle, so); sohandle 113 arch/sh/boards/mach-migor/lcd_qvga.c int migor_lcd_qvga_setup(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so) sohandle 120 arch/sh/boards/mach-migor/lcd_qvga.c migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data)); sohandle 122 arch/sh/boards/mach-migor/lcd_qvga.c if (read_reg16(sohandle, so, 0) != 0x1505) sohandle 127 arch/sh/boards/mach-migor/lcd_qvga.c migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data)); sohandle 128 arch/sh/boards/mach-migor/lcd_qvga.c write_reg16(sohandle, so, 0x00A4, 0x0001); sohandle 131 arch/sh/boards/mach-migor/lcd_qvga.c migor_lcd_qvga_seq(sohandle, so, magic0_data, ARRAY_SIZE(magic0_data)); sohandle 134 arch/sh/boards/mach-migor/lcd_qvga.c migor_lcd_qvga_seq(sohandle, so, magic1_data, ARRAY_SIZE(magic1_data)); sohandle 135 arch/sh/boards/mach-migor/lcd_qvga.c write_reg16(sohandle, so, 0x0050, 0xef - (yres - 1)); sohandle 136 arch/sh/boards/mach-migor/lcd_qvga.c write_reg16(sohandle, so, 0x0051, 0x00ef); sohandle 137 arch/sh/boards/mach-migor/lcd_qvga.c write_reg16(sohandle, so, 0x0052, 0x0000); sohandle 138 arch/sh/boards/mach-migor/lcd_qvga.c write_reg16(sohandle, so, 0x0053, xres - 1); sohandle 140 arch/sh/boards/mach-migor/lcd_qvga.c migor_lcd_qvga_seq(sohandle, so, magic2_data, ARRAY_SIZE(magic2_data)); sohandle 143 arch/sh/boards/mach-migor/lcd_qvga.c migor_lcd_qvga_seq(sohandle, so, magic3_data, ARRAY_SIZE(magic3_data)); sohandle 148 arch/sh/boards/mach-migor/lcd_qvga.c write_reg16(sohandle, so, 0x0020, 0x0000); /* horiz addr */ sohandle 149 arch/sh/boards/mach-migor/lcd_qvga.c write_reg16(sohandle, so, 0x0021, 0x0000); /* vert addr */ sohandle 152 arch/sh/boards/mach-migor/lcd_qvga.c write_reg16(sohandle, so, 0x0022, 0x0000); sohandle 154 arch/sh/boards/mach-migor/lcd_qvga.c write_reg16(sohandle, so, 0x0020, 0x0000); /* reset horiz addr */ sohandle 155 arch/sh/boards/mach-migor/lcd_qvga.c write_reg16(sohandle, so, 0x0021, 0x0000); /* reset vert addr */ sohandle 156 arch/sh/boards/mach-migor/lcd_qvga.c write_reg16(sohandle, so, 0x0007, 0x0173); sohandle 160 arch/sh/boards/mach-migor/lcd_qvga.c write_reg(sohandle, so, 0x00, 0x22);