soff 139 arch/alpha/lib/csum_partial_copy.c unsigned long soff, soff 154 arch/alpha/lib/csum_partial_copy.c extql(first, soff, word); soff 157 arch/alpha/lib/csum_partial_copy.c extqh(second, soff, first); soff 173 arch/alpha/lib/csum_partial_copy.c extql(first, soff, word); soff 174 arch/alpha/lib/csum_partial_copy.c extqh(second, soff, first); soff 251 arch/alpha/lib/csum_partial_copy.c unsigned long soff, unsigned long doff, soff 269 arch/alpha/lib/csum_partial_copy.c extql(first, soff, word); soff 272 arch/alpha/lib/csum_partial_copy.c extqh(second, soff, first); soff 290 arch/alpha/lib/csum_partial_copy.c extql(first, soff, word); soff 291 arch/alpha/lib/csum_partial_copy.c extqh(second, soff, first); soff 311 arch/alpha/lib/csum_partial_copy.c extql(first, soff, word); soff 312 arch/alpha/lib/csum_partial_copy.c extqh(second, soff, first); soff 332 arch/alpha/lib/csum_partial_copy.c unsigned long soff = 7 & (unsigned long) src; soff 342 arch/alpha/lib/csum_partial_copy.c if (!soff) soff 351 arch/alpha/lib/csum_partial_copy.c soff, len-8, checksum, errp); soff 355 arch/alpha/lib/csum_partial_copy.c if (!soff) soff 365 arch/alpha/lib/csum_partial_copy.c soff, doff, len-8, checksum, soff 2472 arch/powerpc/kernel/prom_init.c unsigned long soff; soff 2495 arch/powerpc/kernel/prom_init.c soff = dt_find_string(namep); soff 2496 arch/powerpc/kernel/prom_init.c if (soff != 0) { soff 2498 arch/powerpc/kernel/prom_init.c namep = sstart + soff; soff 2520 arch/powerpc/kernel/prom_init.c unsigned long soff; soff 2576 arch/powerpc/kernel/prom_init.c soff = dt_find_string(pname); soff 2577 arch/powerpc/kernel/prom_init.c if (soff == 0) { soff 2582 arch/powerpc/kernel/prom_init.c prev_name = sstart + soff; soff 2594 arch/powerpc/kernel/prom_init.c dt_push_token(soff, mem_start, mem_end); soff 2607 arch/powerpc/kernel/prom_init.c soff = dt_find_string("phandle"); soff 2608 arch/powerpc/kernel/prom_init.c if (soff == 0) soff 2613 arch/powerpc/kernel/prom_init.c dt_push_token(soff, mem_start, mem_end); soff 133 arch/powerpc/platforms/powermac/bootx_init.c unsigned long soff = bootx_dt_find_string(name); soff 136 arch/powerpc/platforms/powermac/bootx_init.c if (soff == 0) { soff 148 arch/powerpc/platforms/powermac/bootx_init.c dt_push_token(soff, mem_end); soff 222 arch/powerpc/platforms/powermac/bootx_init.c unsigned long soff; soff 258 arch/powerpc/platforms/powermac/bootx_init.c soff = bootx_dt_find_string(namep); soff 259 arch/powerpc/platforms/powermac/bootx_init.c if (soff == 0) soff 380 arch/powerpc/sysdev/mpic.c unsigned int soff = (fixup->index >> 3) & ~3; soff 382 arch/powerpc/sysdev/mpic.c writel(mask, fixup->applebase + soff); soff 1025 drivers/block/aoe/aoecmd.c int soff = 0; soff 1032 drivers/block/aoe/aoecmd.c skb_copy_bits(skb, soff, p, bv.bv_len); soff 1034 drivers/block/aoe/aoecmd.c soff += bv.bv_len; soff 1324 drivers/crypto/hifn_795x.c unsigned int soff, doff; soff 1330 drivers/crypto/hifn_795x.c soff = src->offset; soff 1333 drivers/crypto/hifn_795x.c hifn_setup_src_desc(dev, spage, soff, len, n - len == 0); soff 357 drivers/dma/fsl-edma-common.c edma_writew(edma, le16_to_cpu(tcd->soff), ®s->tcd[ch].soff); soff 374 drivers/dma/fsl-edma-common.c u16 attr, u16 soff, u32 nbytes, u32 slast, u16 citer, soff 391 drivers/dma/fsl-edma-common.c tcd->soff = cpu_to_le16(soff); soff 452 drivers/dma/fsl-edma-common.c u16 soff, doff, iter; soff 492 drivers/dma/fsl-edma-common.c soff = fsl_chan->cfg.dst_addr_width; soff 497 drivers/dma/fsl-edma-common.c soff = 0; soff 502 drivers/dma/fsl-edma-common.c fsl_chan->attr, soff, nbytes, 0, iter, soff 520 drivers/dma/fsl-edma-common.c u16 soff, doff, iter; soff 554 drivers/dma/fsl-edma-common.c soff = fsl_chan->cfg.dst_addr_width; soff 559 drivers/dma/fsl-edma-common.c soff = 0; soff 567 drivers/dma/fsl-edma-common.c dst_addr, fsl_chan->attr, soff, soff 573 drivers/dma/fsl-edma-common.c dst_addr, fsl_chan->attr, soff, soff 72 drivers/dma/fsl-edma-common.h __le16 soff; soff 140 drivers/dma/mpc512x_dma.c u32 soff:16; /* Signed source address offset */ soff 635 drivers/dma/mpc512x_dma.c tcd->soff = 32; soff 641 drivers/dma/mpc512x_dma.c tcd->soff = 16; soff 646 drivers/dma/mpc512x_dma.c tcd->soff = 4; soff 651 drivers/dma/mpc512x_dma.c tcd->soff = 2; soff 656 drivers/dma/mpc512x_dma.c tcd->soff = 1; soff 748 drivers/dma/mpc512x_dma.c tcd->soff = 0; soff 757 drivers/dma/mpc512x_dma.c tcd->soff = mchan->swidth; soff 127 drivers/gpu/drm/nouveau/dispnv04/overlay.c int soff = NV_PCRTC0_SIZE * nv_crtc->index; soff 149 drivers/gpu/drm/nouveau/dispnv04/overlay.c nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff, NV_CRTC_FSEL_OVERLAY, NV_CRTC_FSEL_OVERLAY); soff 30 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c const u32 soff = (chan->chid.ctrl - 1) * 0x04; soff 32 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgv100.c u32 stat = nvkm_rd32(device, 0x610664 + soff); soff 31 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c const u32 soff = (chan->chid.ctrl - 1) * 0x04; soff 33 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgv100.c u32 stat = nvkm_rd32(device, 0x610664 + soff); soff 30 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c const u32 soff = 0x030 * ior->id; soff 34 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c nvkm_wr32(device, 0x10ec00 + soff, (i << 8) | data[i]); soff 36 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c nvkm_wr32(device, 0x10ec00 + soff, (i << 8)); soff 37 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagf119.c nvkm_mask(device, 0x10ec10 + soff, 0x80000002, 0x80000002); soff 30 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c const u32 soff = ior->id * 0x800; soff 34 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c nvkm_wr32(device, 0x61c440 + soff, (i << 8) | data[i]); soff 36 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c nvkm_wr32(device, 0x61c440 + soff, (i << 8)); soff 37 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c nvkm_mask(device, 0x61c448 + soff, 0x80000002, 0x80000002); soff 35 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c const u32 soff = nv50_ior_base(ior); soff 43 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c5a4 + soff, 0x40000000, 0x00000000); soff 44 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c53c + soff, 0x00000001, 0x00000000); soff 45 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000); soff 46 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000); soff 51 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000); soff 53 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_wr32(device, 0x61c528 + soff, avi_infoframe.header); soff 54 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_wr32(device, 0x61c52c + soff, avi_infoframe.subpack0_low); soff 55 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_wr32(device, 0x61c530 + soff, avi_infoframe.subpack0_high); soff 56 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_wr32(device, 0x61c534 + soff, avi_infoframe.subpack1_low); soff 57 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_wr32(device, 0x61c538 + soff, avi_infoframe.subpack1_high); soff 58 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000001); soff 62 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000); soff 63 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_wr32(device, 0x61c508 + soff, 0x000a0184); soff 64 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_wr32(device, 0x61c50c + soff, 0x00000071); soff 65 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_wr32(device, 0x61c510 + soff, 0x00000000); soff 66 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000001); soff 69 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010000); soff 71 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_wr32(device, 0x61c544 + soff, vendor_infoframe.header); soff 72 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_wr32(device, 0x61c548 + soff, vendor_infoframe.subpack0_low); soff 73 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_wr32(device, 0x61c54c + soff, vendor_infoframe.subpack0_high); soff 77 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010001); soff 80 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c5d0 + soff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */ soff 81 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c568 + soff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */ soff 82 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c578 + soff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */ soff 90 drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c nvkm_mask(device, 0x61c5a4 + soff, 0x5f1f007f, ctrl); soff 52 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c const u32 soff = nv50_ior_base(sor); soff 53 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c1e8 + soff, 0x0000ffff, h); soff 54 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c1ec + soff, 0x00ffffff, v); soff 87 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c const u32 soff = nv50_ior_base(sor); soff 95 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c034 + soff, 0x80000000, 0x80000000); soff 97 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c if (!(nvkm_rd32(device, 0x61c034 + soff) & 0x80000000)) soff 106 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c const u32 soff = nv50_ior_base(sor); soff 117 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x614300 + soff, 0x000c0000, clksor); soff 126 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c const u32 soff = nv50_ior_base(sor); soff 128 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c switch (nvkm_rd32(device, 0x614300 + soff) & 0x00030000) { soff 172 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c const u32 soff = nv50_ior_base(sor); soff 178 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c sorpwr = nvkm_rd32(device, 0x61c004 + soff); soff 180 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c u32 seqctl = nvkm_rd32(device, 0x61c030 + soff); soff 184 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_wr32(device, 0x61c040 + soff + pd_pc * 4, 0x1f008000); soff 187 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c if (!(nvkm_rd32(device, 0x61c030 + soff) & 0x10000000)) soff 190 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c004 + soff, 0x80000001, 0x80000000); soff 192 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c if (!(nvkm_rd32(device, 0x61c030 + soff) & 0x10000000)) soff 196 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_wr32(device, 0x61c040 + soff + pd_pc * 4, 0x00002000); soff 197 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_wr32(device, 0x61c040 + soff + pu_pc * 4, 0x1f000000); soff 200 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c10c + soff, 0x00000001, 0x00000000); soff 201 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x614300 + soff, 0x03000000, 0x00000000); soff 204 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c004 + soff, 0x80000001, 0x80000001); soff 214 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c const u32 soff = nv50_ior_base(sor); soff 220 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x614300 + soff, 0x03000000, 0x03000000); soff 221 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c10c + soff, 0x00000001, 0x00000001); soff 223 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c00c + soff, 0x0f000000, 0x00000000); soff 224 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c008 + soff, 0xff000000, 0x14000000); soff 226 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c008 + soff, 0xff000000, 0x00000000); soff 227 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_mask(device, 0x61c00c + soff, 0x0f000000, 0x01000000); soff 229 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c if (nvkm_rd32(device, 0x61c004 + soff) & 0x00000001) { soff 230 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c u32 seqctl = nvkm_rd32(device, 0x61c030 + soff); soff 232 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c nvkm_wr32(device, 0x61c040 + soff + pu_pc * 4, 0x1f008000); soff 94 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c const u32 soff = nv50_ior_base(sor); soff 95 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, 0x01010101 * pattern); soff 102 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c const u32 soff = nv50_ior_base(sor); soff 114 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor); soff 123 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c const u32 soff = nv50_ior_base(sor); soff 128 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c nvkm_mask(device, 0x612300 + soff, 0x007c0000, speed << 18); soff 132 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c nvkm_mask(device, 0x612300 + soff, 0x00000707, (div2 << 8) | div1); soff 30 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c const u32 soff = nv50_ior_base(sor); soff 33 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data); soff 35 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data); soff 30 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgt215.c const u32 soff = nv50_ior_base(sor); soff 33 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgt215.c nvkm_mask(device, 0x61c1e0 + soff, mask, data); soff 35 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgt215.c if (!(nvkm_rd32(device, 0x61c1e0 + soff) & 0x80000000)) soff 33 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c const u32 soff = nv50_ior_base(sor); soff 34 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c nvkm_mask(device, 0x614300 + soff, 0x00000707, (div << 8) | div); soff 38 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c nv50_sor_power_wait(struct nvkm_device *device, u32 soff) soff 41 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c if (!(nvkm_rd32(device, 0x61c004 + soff) & 0x80000000)) soff 51 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c const u32 soff = nv50_ior_base(sor); soff 56 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c nv50_sor_power_wait(device, soff); soff 57 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c nvkm_mask(device, 0x61c004 + soff, field, state); soff 58 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c nv50_sor_power_wait(device, soff); soff 61 drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c if (!(nvkm_rd32(device, 0x61c030 + soff) & 0x10000000)) soff 41 drivers/gpu/drm/nouveau/nvkm/engine/disp/sortu102.c const u32 soff = nv50_ior_base(sor); soff 53 drivers/gpu/drm/nouveau/nvkm/engine/disp/sortu102.c nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor); soff 57 drivers/gpu/drm/nouveau/nvkm/engine/disp/sortu102.c nvkm_mask(device, 0x612300 + soff, 0x00030000, 0x00010000); soff 2191 drivers/net/ethernet/brocade/bna/bfa_ioc.c bfa_nw_ioc_smem_read(struct bfa_ioc *ioc, void *tbuf, u32 soff, u32 sz) soff 2197 drivers/net/ethernet/brocade/bna/bfa_ioc.c pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, soff); soff 2198 drivers/net/ethernet/brocade/bna/bfa_ioc.c loff = PSS_SMEM_PGOFF(soff); soff 105 drivers/net/ethernet/netronome/nfp/bpf/verifier.c unsigned int soff; soff 107 drivers/net/ethernet/netronome/nfp/bpf/verifier.c soff = -(off + i) - 1; soff 108 drivers/net/ethernet/netronome/nfp/bpf/verifier.c stack_entry = &state->stack[soff / BPF_REG_SIZE]; soff 109 drivers/net/ethernet/netronome/nfp/bpf/verifier.c if (stack_entry->slot_type[soff % BPF_REG_SIZE] == STACK_ZERO) soff 114 drivers/net/ethernet/netronome/nfp/bpf/verifier.c i, soff); soff 1177 drivers/net/ethernet/sun/cassini.c val |= CAS_BASE(HP_INSTR_RAM_MID_SOFF, inst->soff); soff 2125 drivers/net/ethernet/sun/cassini.h u8 soff, snext; /* if match succeeds, new offset and match */ soff 2045 drivers/scsi/bfa/bfa_ioc.c bfa_ioc_smem_read(struct bfa_ioc_s *ioc, void *tbuf, u32 soff, u32 sz) soff 2052 drivers/scsi/bfa/bfa_ioc.c pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, soff); soff 2053 drivers/scsi/bfa/bfa_ioc.c loff = PSS_SMEM_PGOFF(soff); soff 2104 drivers/scsi/bfa/bfa_ioc.c bfa_ioc_smem_clr(struct bfa_ioc_s *ioc, u32 soff, u32 sz) soff 2109 drivers/scsi/bfa/bfa_ioc.c pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, soff); soff 2110 drivers/scsi/bfa/bfa_ioc.c loff = PSS_SMEM_PGOFF(soff); soff 288 drivers/video/console/vgacon.c int start, end, count, soff; soff 323 drivers/video/console/vgacon.c soff = vgacon_scrollback_cur->tail - soff 325 drivers/video/console/vgacon.c soff -= count * c->vc_size_row; soff 327 drivers/video/console/vgacon.c if (soff < 0) soff 328 drivers/video/console/vgacon.c soff += vgacon_scrollback_cur->size; soff 344 drivers/video/console/vgacon.c copysize = min(count, vgacon_scrollback_cur->size - soff); soff 345 drivers/video/console/vgacon.c scr_memcpyw(d, vgacon_scrollback_cur->data + soff, copysize); soff 70 fs/nfsd/blocklayout.c bex->soff = iomap.addr; soff 83 fs/nfsd/blocklayout.c bex->soff = iomap.addr; soff 35 fs/nfsd/blocklayoutxdr.c p = xdr_encode_hyper(p, b->soff); soff 153 fs/nfsd/blocklayoutxdr.c p = xdr_decode_hyper(p, &bex.soff); soff 154 fs/nfsd/blocklayoutxdr.c if (bex.soff & (block_size - 1)) { soff 156 fs/nfsd/blocklayoutxdr.c __func__, bex.soff); soff 15 fs/nfsd/blocklayoutxdr.h u64 soff; soff 1960 kernel/bpf/verifier.c int soff = (-spi - 1) * BPF_REG_SIZE; soff 1969 kernel/bpf/verifier.c if (*poff && *poff != soff) { soff 1976 kernel/bpf/verifier.c insn_idx, *poff, soff); soff 1979 kernel/bpf/verifier.c *poff = soff;