socfpgaclk         24 drivers/clk/socfpga/clk-gate-a10.c 	struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk);
socfpgaclk         27 drivers/clk/socfpga/clk-gate-a10.c 	if (socfpgaclk->fixed_div)
socfpgaclk         28 drivers/clk/socfpga/clk-gate-a10.c 		div = socfpgaclk->fixed_div;
socfpgaclk         29 drivers/clk/socfpga/clk-gate-a10.c 	else if (socfpgaclk->div_reg) {
socfpgaclk         30 drivers/clk/socfpga/clk-gate-a10.c 		val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
socfpgaclk         31 drivers/clk/socfpga/clk-gate-a10.c 		val &= GENMASK(socfpgaclk->width - 1, 0);
socfpgaclk         40 drivers/clk/socfpga/clk-gate-a10.c 	struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk);
socfpgaclk         45 drivers/clk/socfpga/clk-gate-a10.c 	if (socfpgaclk->clk_phase[0] || socfpgaclk->clk_phase[1]) {
socfpgaclk         47 drivers/clk/socfpga/clk-gate-a10.c 			switch (socfpgaclk->clk_phase[i]) {
socfpgaclk         79 drivers/clk/socfpga/clk-gate-a10.c 		if (!IS_ERR(socfpgaclk->sys_mgr_base_addr))
socfpgaclk         80 drivers/clk/socfpga/clk-gate-a10.c 			regmap_write(socfpgaclk->sys_mgr_base_addr,
socfpgaclk         17 drivers/clk/socfpga/clk-gate-s10.c 	struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk);
socfpgaclk         20 drivers/clk/socfpga/clk-gate-s10.c 	if (socfpgaclk->fixed_div) {
socfpgaclk         21 drivers/clk/socfpga/clk-gate-s10.c 		div = socfpgaclk->fixed_div;
socfpgaclk         22 drivers/clk/socfpga/clk-gate-s10.c 	} else if (socfpgaclk->div_reg) {
socfpgaclk         23 drivers/clk/socfpga/clk-gate-s10.c 		val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
socfpgaclk         24 drivers/clk/socfpga/clk-gate-s10.c 		val &= GENMASK(socfpgaclk->width - 1, 0);
socfpgaclk         33 drivers/clk/socfpga/clk-gate-s10.c 	struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk);
socfpgaclk         36 drivers/clk/socfpga/clk-gate-s10.c 	val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
socfpgaclk         37 drivers/clk/socfpga/clk-gate-s10.c 	val &= GENMASK(socfpgaclk->width - 1, 0);
socfpgaclk         46 drivers/clk/socfpga/clk-gate-s10.c 	struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk);
socfpgaclk         50 drivers/clk/socfpga/clk-gate-s10.c 	if (socfpgaclk->bypass_reg) {
socfpgaclk         51 drivers/clk/socfpga/clk-gate-s10.c 		mask = (0x1 << socfpgaclk->bypass_shift);
socfpgaclk         52 drivers/clk/socfpga/clk-gate-s10.c 		parent = ((readl(socfpgaclk->bypass_reg) & mask) >>
socfpgaclk         53 drivers/clk/socfpga/clk-gate-s10.c 			  socfpgaclk->bypass_shift);
socfpgaclk         93 drivers/clk/socfpga/clk-gate.c 	struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk);
socfpgaclk         96 drivers/clk/socfpga/clk-gate.c 	if (socfpgaclk->fixed_div)
socfpgaclk         97 drivers/clk/socfpga/clk-gate.c 		div = socfpgaclk->fixed_div;
socfpgaclk         98 drivers/clk/socfpga/clk-gate.c 	else if (socfpgaclk->div_reg) {
socfpgaclk         99 drivers/clk/socfpga/clk-gate.c 		val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
socfpgaclk        100 drivers/clk/socfpga/clk-gate.c 		val &= GENMASK(socfpgaclk->width - 1, 0);
socfpgaclk        102 drivers/clk/socfpga/clk-gate.c 		if ((int) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET)
socfpgaclk        113 drivers/clk/socfpga/clk-gate.c 	struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk);
socfpgaclk        119 drivers/clk/socfpga/clk-gate.c 	if (socfpgaclk->clk_phase[0] || socfpgaclk->clk_phase[1]) {
socfpgaclk        127 drivers/clk/socfpga/clk-gate.c 			switch (socfpgaclk->clk_phase[i]) {
socfpgaclk         23 drivers/clk/socfpga/clk-periph-a10.c 	struct socfpga_periph_clk *socfpgaclk = to_socfpga_periph_clk(hwclk);
socfpgaclk         26 drivers/clk/socfpga/clk-periph-a10.c 	if (socfpgaclk->fixed_div) {
socfpgaclk         27 drivers/clk/socfpga/clk-periph-a10.c 		div = socfpgaclk->fixed_div;
socfpgaclk         28 drivers/clk/socfpga/clk-periph-a10.c 	} else if (socfpgaclk->div_reg) {
socfpgaclk         29 drivers/clk/socfpga/clk-periph-a10.c 		div = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
socfpgaclk         30 drivers/clk/socfpga/clk-periph-a10.c 		div &= GENMASK(socfpgaclk->width - 1, 0);
socfpgaclk         33 drivers/clk/socfpga/clk-periph-a10.c 		div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1);
socfpgaclk         41 drivers/clk/socfpga/clk-periph-a10.c 	struct socfpga_periph_clk *socfpgaclk = to_socfpga_periph_clk(hwclk);
socfpgaclk         45 drivers/clk/socfpga/clk-periph-a10.c 	clk_src = readl(socfpgaclk->hw.reg);
socfpgaclk         21 drivers/clk/socfpga/clk-periph-s10.c 	struct socfpga_periph_clk *socfpgaclk = to_periph_clk(hwclk);
socfpgaclk         25 drivers/clk/socfpga/clk-periph-s10.c 	val = readl(socfpgaclk->hw.reg);
socfpgaclk         35 drivers/clk/socfpga/clk-periph-s10.c 	struct socfpga_periph_clk *socfpgaclk = to_periph_clk(hwclk);
socfpgaclk         38 drivers/clk/socfpga/clk-periph-s10.c 	if (socfpgaclk->fixed_div) {
socfpgaclk         39 drivers/clk/socfpga/clk-periph-s10.c 		div = socfpgaclk->fixed_div;
socfpgaclk         41 drivers/clk/socfpga/clk-periph-s10.c 		if (socfpgaclk->hw.reg)
socfpgaclk         42 drivers/clk/socfpga/clk-periph-s10.c 			div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1);
socfpgaclk         50 drivers/clk/socfpga/clk-periph-s10.c 	struct socfpga_periph_clk *socfpgaclk = to_periph_clk(hwclk);
socfpgaclk         54 drivers/clk/socfpga/clk-periph-s10.c 	if (socfpgaclk->bypass_reg) {
socfpgaclk         55 drivers/clk/socfpga/clk-periph-s10.c 		mask = (0x1 << socfpgaclk->bypass_shift);
socfpgaclk         56 drivers/clk/socfpga/clk-periph-s10.c 		parent = ((readl(socfpgaclk->bypass_reg) & mask) >>
socfpgaclk         57 drivers/clk/socfpga/clk-periph-s10.c 			   socfpgaclk->bypass_shift);
socfpgaclk         59 drivers/clk/socfpga/clk-periph-s10.c 		clk_src = readl(socfpgaclk->hw.reg);
socfpgaclk         20 drivers/clk/socfpga/clk-periph.c 	struct socfpga_periph_clk *socfpgaclk = to_socfpga_periph_clk(hwclk);
socfpgaclk         23 drivers/clk/socfpga/clk-periph.c 	if (socfpgaclk->fixed_div) {
socfpgaclk         24 drivers/clk/socfpga/clk-periph.c 		div = socfpgaclk->fixed_div;
socfpgaclk         26 drivers/clk/socfpga/clk-periph.c 		if (socfpgaclk->div_reg) {
socfpgaclk         27 drivers/clk/socfpga/clk-periph.c 			val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift;
socfpgaclk         28 drivers/clk/socfpga/clk-periph.c 			val &= GENMASK(socfpgaclk->width - 1, 0);
socfpgaclk         31 drivers/clk/socfpga/clk-periph.c 		div = ((readl(socfpgaclk->hw.reg) & 0x1ff) + 1);
socfpgaclk         37 drivers/clk/socfpga/clk-pll-a10.c 	struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
socfpgaclk         42 drivers/clk/socfpga/clk-pll-a10.c 	reg = readl(socfpgaclk->hw.reg + 0x4);
socfpgaclk         52 drivers/clk/socfpga/clk-pll-a10.c 	struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
socfpgaclk         55 drivers/clk/socfpga/clk-pll-a10.c 	pll_src = readl(socfpgaclk->hw.reg);
socfpgaclk         33 drivers/clk/socfpga/clk-pll-s10.c 	struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
socfpgaclk         40 drivers/clk/socfpga/clk-pll-s10.c 	reg = readl(socfpgaclk->hw.reg);
socfpgaclk         45 drivers/clk/socfpga/clk-pll-s10.c 	reg = readl(socfpgaclk->hw.reg + 0x4);
socfpgaclk         55 drivers/clk/socfpga/clk-pll-s10.c 	struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
socfpgaclk         58 drivers/clk/socfpga/clk-pll-s10.c 	div = ((readl(socfpgaclk->hw.reg) &
socfpgaclk         68 drivers/clk/socfpga/clk-pll-s10.c 	struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
socfpgaclk         71 drivers/clk/socfpga/clk-pll-s10.c 	pll_src = readl(socfpgaclk->hw.reg);
socfpgaclk         78 drivers/clk/socfpga/clk-pll-s10.c 	struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
socfpgaclk         81 drivers/clk/socfpga/clk-pll-s10.c 	pll_src = readl(socfpgaclk->hw.reg);
socfpgaclk         88 drivers/clk/socfpga/clk-pll-s10.c 	struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
socfpgaclk         92 drivers/clk/socfpga/clk-pll-s10.c 	reg = readl(socfpgaclk->hw.reg);
socfpgaclk         94 drivers/clk/socfpga/clk-pll-s10.c 	writel(reg, socfpgaclk->hw.reg);
socfpgaclk         41 drivers/clk/socfpga/clk-pll.c 	struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
socfpgaclk         46 drivers/clk/socfpga/clk-pll.c 	reg = readl(socfpgaclk->hw.reg);
socfpgaclk         61 drivers/clk/socfpga/clk-pll.c 	struct socfpga_pll *socfpgaclk = to_socfpga_clk(hwclk);
socfpgaclk         63 drivers/clk/socfpga/clk-pll.c 	pll_src = readl(socfpgaclk->hw.reg);