soc_desc 58 drivers/clk/mvebu/clk-corediv.c const struct clk_corediv_soc_desc *soc_desc; soc_desc 82 drivers/clk/mvebu/clk-corediv.c const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; soc_desc 84 drivers/clk/mvebu/clk-corediv.c u32 enable_mask = BIT(desc->fieldbit) << soc_desc->enable_bit_offset; soc_desc 92 drivers/clk/mvebu/clk-corediv.c const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; soc_desc 100 drivers/clk/mvebu/clk-corediv.c reg |= (BIT(desc->fieldbit) << soc_desc->enable_bit_offset); soc_desc 111 drivers/clk/mvebu/clk-corediv.c const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; soc_desc 119 drivers/clk/mvebu/clk-corediv.c reg &= ~(BIT(desc->fieldbit) << soc_desc->enable_bit_offset); soc_desc 129 drivers/clk/mvebu/clk-corediv.c const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; soc_desc 133 drivers/clk/mvebu/clk-corediv.c reg = readl(corediv->reg + soc_desc->ratio_offset); soc_desc 157 drivers/clk/mvebu/clk-corediv.c const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; soc_desc 167 drivers/clk/mvebu/clk-corediv.c reg = readl(corediv->reg + soc_desc->ratio_offset); soc_desc 170 drivers/clk/mvebu/clk-corediv.c writel(reg, corediv->reg + soc_desc->ratio_offset); soc_desc 177 drivers/clk/mvebu/clk-corediv.c reg = readl(corediv->reg) | soc_desc->ratio_reload; soc_desc 185 drivers/clk/mvebu/clk-corediv.c reg &= ~(CORE_CLK_DIV_RATIO_MASK | soc_desc->ratio_reload); soc_desc 252 drivers/clk/mvebu/clk-corediv.c const struct clk_corediv_soc_desc *soc_desc) soc_desc 268 drivers/clk/mvebu/clk-corediv.c clk_data.clk_num = soc_desc->ndescs; soc_desc 289 drivers/clk/mvebu/clk-corediv.c init.ops = &soc_desc->ops; soc_desc 292 drivers/clk/mvebu/clk-corediv.c corediv[i].soc_desc = soc_desc; soc_desc 293 drivers/clk/mvebu/clk-corediv.c corediv[i].desc = soc_desc->descs + i;